//`timescale 10ns/100ps module test_benchpermanent2; wor m1,m2,m3,m4,m5,m6,m7,m8,m9,m10,m11,m12,m13,m14,m16,m17,m18,m19,m21,m23,m24,m25,m22,m28,m26,m29,m30,m31,m32,m33,m34; reg d_in1, d_in2; reg fault_1,fault_2,fault_3,fault_4,fault_5,fault_6; reg [1:0] zone1,zone2,zone3,zone4; parameter [1:0] switch=1, hold=2, rele=3, relax=0; assign x=d_in1; assign y=d_in2; //assign m20 = 1'b0; //assign m10 = 1'b0; assign fakenode =1'bz; //assign m1 = fakenode; //assign m2 = fakenode; //assign m3 = fakenode; //assign m4 = fakenode; //assign m5 = fakenode; //assign m6 = fakenode; //assign m7 = fakenode; //assign m8 = fakenode; //assign m9 = fakenode; //assign m10 = fakenode; //assign m11 = fakenode; //assign m12 = fakenode; //assign m13 = fakenode; //assign m28 = fakenode; //assign m15 = fakenode; //assign m16 = fakenode; //assign m17 = fakenode; //assign m18 = fakenode; //assign m19 = fakenode; //assign m20 = fakenode; //assign m21 = fakenode; //assign m22 = fakenode; //assign m23 = fakenode; //assign m24 = fakenode; //assign m25 = fakenode; //assign m26 = fakenode; //assign m29 = fakenode; //assign m30 = fakenode; //assign m31 = fakenode; //assign m32 = fakenode; //assign m33 = fakenode; //assign m34 = fakenode; Wire_bi6 W1 ( .A(x), .B(m1), .fault(1'b0), .status(zone1) ); Fanout_A4 FO1( .A(m1), .B(m4), .C(m2), .fault(1'b0), .status(zone2) ); Wire_bi6 W2 ( .A(m4), .B(m5), .fault(1'b0), .status(zone2) ); Wire_bi6 W3 ( .A(m2), .B(m3), .fault(1'b0), .status(zone2) ); //Wire_bi6 prova2 ( // .A(m3), // .B(m24), // .fault(1'b0), // .status(zone3) // ); Inverter_new IN1 ( .A(m3), .B(m24), .status(zone3), .fault(1'b0)); Wire_bi6 W4 ( .A(m24), .B(m23), .fault(1'b0), .status(zone4) ); LShapedWire_4 LSW1( .A(m5), .B(m6), .fault(1'b0), .status(zone3) ); Wire_bi6 W5 ( .A(m6), .B(m7), .fault(1'b0), .status(zone3) ); Wire_bi6 W6 ( .A(y), .B(m26), .fault(1'b0), .status(zone1) ); Fanout_A4 FO2( .A(m26), .B(m25), .C(m28), .fault(1'b0), .status(zone2) ); Wire_bi6 W7 ( .A(m28), .B(m29), .fault(1'b0), .status(zone2) ); LShapedWire_4 LSW4( .A(m29), .B(m30), .fault(1'b0), .status(zone2) ); Wire_bi6 W8 ( .A(m25), .B(m22), .fault(1'b0), .status(zone3) ); Inverter_new IN2 ( .A(m30), .B(m31), .status(zone3), .fault(1'b0) ); //Wire_bi6 prova1 ( // .A(m30), // .B(m31), // .fault(1'b0), // .status(zone3) // ); Wire_bi6 W9 ( .A(m31), .B(m32), .fault(1'b0), .status(zone4) ); Wire_bi6 W10 ( .A(m7), .B(m8), .fault(1'b0), .status(zone4) ); LShapedWire_4 LSW2( .A(m8), .B(m9), .fault(1'b0), .status(zone4) ); LShapedWire_4 LSW3( .A(m22), .B(m21), .fault(1'b0), .status(zone4) ); Wire_4 Wm10( .A(1'b0), .B(m10), .status(zone4) ); assign m20 =1'b0; MajorityVoter_bi4 MV1 ( .A(m23), .B(m20), .Zp(m19), .Z(m21), .status(zone1), .fault1(1'b0), .fault0(1'b0) ); Wire_4 Wm20( .A(1'b0), .B(m20), .status(zone4) ); assign m10 =1'b0; MajorityVoter_bi4 MV2 ( .A(m32), .B(m10), .Zp(m11), .Z(m9), .status(zone1), .fault1(1'b0), .fault0(1'b0) ); LShapedWire_4 LSW5( .A(m12), .B(m13), .fault(1'b0), .status(zone2) ); Wire_bi6 W11 ( .A(m11), .B(m12), .fault(1'b0), .status(zone2) ); Wire_bi6 W12 ( .A(m13), .B(m14), .fault(1'b0), .status(zone2) ); Wire_4 Wm50( .A(1'b1), .B(m50), .status(zone2) ); assign m15 =1'b1; MajorityVoter_4 MV3 ( .B(m15), .A(m14), .Zp(m17), .C(m16), .status(zone3), .fault1(1'b1), .fault0(1'b0) ); LShapedWire_4 LSW6( .A(m18), .B(m16), .fault(1'b0), .status(zone2) ); Wire_bi6 W13 ( .A(m19), .B(m18), .fault(1'b0), .status(zone2) ); Wire_bi6 W14 ( .A(m17), .B(m33), .fault(1'b0), .status(zone4) ); Wire_bi6 W15 ( .A(m33), .B(m34), .fault(1'b0), .status(zone1) ); initial begin d_in1<=1; d_in2 <=0; zone1 <=relax; zone2 <=rele; zone3 <=hold; zone4 <=switch; fault_1 <=0; fault_2 <=0; fault_3 <=0; fault_4 <=0; fault_5 <=0; fault_6 <=0; end always begin #349 d_in1 <=~d_in1; //#0 y <=1; #201 d_in2 <=~d_in2; // #0 x <=1; //#200 x <=0; // #0 y <=0; // #200 w <=1; // #0 y <=1; // #200 x <=0; // #0 y<=1; end //always // begin // #230 fault_4 <= ~fault_4; // #150 fault_4 <= ~fault_4; // end //period=200 always@(zone1) begin #25 zone1 <= zone1 +1 ; end always@(zone2) begin #25 zone2 <= zone2 +1 ; end always@(zone3) begin #25 zone3 <= zone3 +1 ; end always@(zone4) begin #25 zone4 <= zone4 +1 ; end endmodule