Index: trunk/sim/tb_top.v
===================================================================
--- trunk/sim/tb_top.v	(revision 11)
+++ trunk/sim/tb_top.v	(revision 16)
@@ -32,14 +32,14 @@
    wire [DQS_WIDTH-1:0]         ddr2_dqs_n_sdram;
    wire [7:0]                   ddr2_dm_sdram;
-   reg      		        ddr2_clk_sdram;
-   reg           		ddr2_clk_n_sdram;
-   reg           		ddr2_address_sdram;
-   reg [2:0]         		ddr2_ba_sdram;
-   reg                          ddr2_ras_n_sdram;
-   reg                          ddr2_cas_n_sdram;
-   reg                          ddr2_we_n_sdram;
-   reg [CS_WIDTH-1:0]           ddr2_cs_n_sdram;
-   reg 			        ddr2_cke_sdram;
-   reg [ODT_WIDTH-1:0]          ddr2_odt_sdram;
+   wire      		        ddr2_clk_sdram;
+   wire           		ddr2_clk_n_sdram;
+   wire           		ddr2_address_sdram;
+   wire [2:0]         		ddr2_ba_sdram;
+   wire                         ddr2_ras_n_sdram;
+   wire                         ddr2_cas_n_sdram;
+   wire                         ddr2_we_n_sdram;
+   wire [CS_WIDTH-1:0]          ddr2_cs_n_sdram;
+   wire 			ddr2_cke_sdram;
+   wire [ODT_WIDTH-1:0]         ddr2_odt_sdram;
 
    wire 			 stx;