Index: trunk/sw/boot.S
===================================================================
--- trunk/sw/boot.S	(revision 35)
+++ trunk/sw/boot.S	(revision 36)
@@ -33,5 +33,5 @@
         mov    %g0, %o5
 
-        !wrpr   %g0, 0, %gl
+	!wrpr   %g0, 0, %gl
         !wrpr   %g0, 0, %tl
 
Index: trunk/sw/linker.lds
===================================================================
--- trunk/sw/linker.lds	(revision 33)
+++ trunk/sw/linker.lds	(revision 36)
@@ -6,5 +6,5 @@
 
 SECTIONS { 
-  .boot 0x0000000000000020 : { *(.boot);}
+  .boot 0xf0000020: { *(.boot);}
   .text : { *(.text) }
   .data : { *(.data) } 
Index: trunk/sw/uart.c
===================================================================
--- trunk/sw/uart.c	(revision 34)
+++ trunk/sw/uart.c	(revision 36)
@@ -1,6 +1,8 @@
 #include "uart.h"
 
-const long UART_BASE_ADR[1] = {0x800000FFF0C2C000};
-const int UART_BAUDS[1] = {0};
+#define BASE_UART 0x800000FFF0C2C000 
+#define BAUD_UART 100000 
+//const long UART_BASE_ADR[1] = {0x800000FFF0C2C000};
+//const int UART_BAUDS[1] = {0};
 const int BAUD_RATE =100000;
 const int IN_CLK =50000000;
@@ -12,17 +14,17 @@
 #define WAIT_FOR_XMITR(core)			\
 do { \
-lsr = REG8(UART_BASE_ADR[core] + UART_LSR); \
+lsr = REG8(BASE_UART + UART_LSR); \
 } while ((lsr & BOTH_EMPTY) != BOTH_EMPTY)
 
 #define WAIT_FOR_THRE(core)			\
 do { \
-lsr = REG8(UART_BASE_ADR[core] + UART_LSR); \
+lsr = REG8(BASE_UART + UART_LSR); \
 } while ((lsr & UART_LSR_THRE) != UART_LSR_THRE)
 
-#define CHECK_FOR_CHAR(core) (REG8(UART_BASE_ADR[core] + UART_LSR) & UART_LSR_DR)
+#define CHECK_FOR_CHAR(core) (REG8(BASE_UART + UART_LSR) & UART_LSR_DR)
 
 #define WAIT_FOR_CHAR(core)			\
 do { \
-lsr = REG8(UART_BASE_ADR[core] + UART_LSR); \
+lsr = REG8(BASE_UART + UART_LSR); \
 } while ((lsr & UART_LSR_DR) != UART_LSR_DR)
 
@@ -50,4 +52,5 @@
 */
 	uart_init(0);
+
 	for(;;) { 
 		uart_puts(0,"XOpenSparc is alive \n"); 
@@ -62,14 +65,24 @@
 	//float float_divisor;
 	/* Reset receiver and transmiter */
-	REG8( UART_FCR ) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14;
-	//asm("clr %sp \n");	
+	asm("nop \n");	
+	asm("nop \n");	
+	asm("nop \n");	
+	asm("nop \n");
+	REG8( BASE_UART + UART_FCR ) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14;
+	//REG8( UART_BASE_ADR[core] + UART_FCR ) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14;
+	asm("nop \n");	
+	asm("nop \n");	
+	asm("nop \n");	
+	asm("nop \n");	
+	asm("nop \n");	
 	//asm("sethi %hi(8), %sp \n");	
 	//asm("mov 0xfff, %sp \n");	
 
 	/* Disable all interrupts */
-	REG8(UART_BASE_ADR[core] + UART_IER) = 0x00;
+	REG8(BASE_UART + UART_IER) = 0x00;
+	//REG8(UART_BASE_ADR[core] + UART_IER) = 0x00;
 	
 	/* Set 8 bit char, 1 stop bit, no parity */
-	REG8(UART_BASE_ADR[core] + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY);
+	REG8(BASE_UART + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY);
 	
 	/* Set baud rate */
@@ -79,8 +92,8 @@
 	divisor = BAUD_RATE;
 
-	REG8(UART_BASE_ADR[core] + UART_LCR) |= UART_LCR_DLAB;
-	REG8(UART_BASE_ADR[core] + UART_DLL) = divisor & 0x000000ff;
-	REG8(UART_BASE_ADR[core] + UART_DLM) = (divisor >> 8) & 0x000000ff;
-	REG8(UART_BASE_ADR[core] + UART_LCR) &= ~(UART_LCR_DLAB);
+	REG8(BASE_UART + UART_LCR) |= UART_LCR_DLAB;
+	REG8(BASE_UART + UART_DLL) = divisor & 0x000000ff;
+	REG8(BASE_UART + UART_DLM) = (divisor >> 8) & 0x000000ff;
+	REG8(BASE_UART + UART_LCR) &= ~(UART_LCR_DLAB);
 	
 	return;
@@ -92,8 +105,8 @@
 	
 	WAIT_FOR_THRE(core);
-	REG8(UART_BASE_ADR[core] + UART_TX) = c;
+	REG8(BASE_UART + UART_TX) = c;
 	if(c == '\n') {
 		WAIT_FOR_THRE(core);
-		REG8(UART_BASE_ADR[core] + UART_TX) = '\r';
+		REG8(BASE_UART + UART_TX) = '\r';
 	}
 	WAIT_FOR_XMITR(core);
Index: trunk/os2wb/os2wb.v
===================================================================
--- trunk/os2wb/os2wb.v	(revision 33)
+++ trunk/os2wb/os2wb.v	(revision 36)
@@ -438,11 +438,14 @@
                            if(pcx_packet_d[122:118]==5'b10000 && !pcx_req_d[4])
                            begin
-			      $display("INFO: OS2WB: ifill");
+			      $display("INFO: OS2WB: DRAM ifill");
                               wb_addr<={pcx_req_d,19'b0,pcx_packet_d[103:64+5],5'b00000}; //DRAM ifill
                            end
 			   else
                               if(pcx_packet_d[64+39:64+28]==12'hFFF && pcx_packet_d[64+27:64+24]!=4'b0) // flash remap FFF1->FFF8
-                                 wb_addr<={pcx_req_d,19'b0,pcx_packet_d[103:64+3]+37'h0000E00000,3'b000};
-                              else
+                                 begin
+			          $display("INFO: OS2WB: flash remap");
+				  wb_addr<={pcx_req_d,19'b0,pcx_packet_d[103:64+3]+37'h0000E00000,3'b000};
+                                 end
+				else
                                  wb_addr<={pcx_req_d,19'b0,pcx_packet_d[103:64+3],3'b000};
                         wb_data_o<=pcx_packet_d[63:0];
@@ -689,5 +692,5 @@
                if(wb_ack)
                   begin
-                     $display("INFO: OS2WB: PCX_REQ_STEP1_1 wb_addr = %x wb_data_i = %x wb_data_o =  ",wb_addr, wb_data_i,wb_data_o);
+                     $display("INFO: OS2WB: PCX_REQ_STEP1_1 wb_addr = %x wb_data_i = %x wb_data_o = %x ",wb_addr, wb_data_i,wb_data_o);
                      cpx_packet_1[144]<=1;     // Valid
                      cpx_packet_1[139]<=(pcx_packet_d[122:118]==5'b00000) || (pcx_packet_d[122:118]==5'b10000) ? 1:0; // L2 always miss on load and ifill
Index: trunk/tools/dump2hex.php
===================================================================
--- trunk/tools/dump2hex.php	(revision 30)
+++ trunk/tools/dump2hex.php	(revision 36)
@@ -31,8 +31,8 @@
   while (!feof($fp)) {
     $line = fgets($fp);
-    $opcode1 = substr($line, 6, 2);
-    $opcode2 = substr($line, 9, 2);
-    $opcode3 = substr($line, 12, 2);
-    $opcode4 = substr($line, 15, 2);
+    $opcode1 = substr($line, 14, 2);
+    $opcode2 = substr($line, 17, 2);
+    $opcode3 = substr($line, 20, 2);
+    $opcode4 = substr($line, 23, 2);
     $caratteri = strlen($opcode1);
     if($caratteri != 0){
@@ -44,5 +44,7 @@
     }
     else{
-        for($i=0; $i<1; $i++) fgets($fp);
+        echo "//".$line;
+        $line = fgets($fp);
+        echo "//".$line;
      } 
     }
Index: trunk/tools/compila
===================================================================
--- trunk/tools/compila	(revision 33)
+++ trunk/tools/compila	(revision 36)
@@ -10,16 +10,21 @@
 
 #assembla il boot.S
-/opt/sparc64-sun-solaris2.8-toolchain/bin/sparc-sun-solaris2.8-as -64 boot.S -o boot.o
+echo "create boot.o"
+/opt/sparc64-sun-solaris2.8-toolchain/bin/sparc-sun-solaris2.8-as -xarch=v9 -64 boot.S -o boot.o
 
 ## compila con ISA SPARC-V9
+echo "compile $1.c"
 /opt/sparc64-sun-solaris2.8-toolchain/bin/sparc64-sun-solaris2.8-gcc -m64 -ffreestanding -nostdinc -Os -c $1.c
 
 ## linka con ISA SPARC-V9 a 64 bits
 echo "create $1.bin"
-/opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/ld -melf64_sparc --script linker.lds boot.o $1.o -o $1.bin
+#/opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/ld -melf64_sparc --script linker.lds boot.o $1.o -o $1.bin
+
+### da codice S1
+/opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/ld -melf64_sparc --script=linker.map -EB -o $1.bin boot.o $1.o
 
 
 ## fa il dump del file
-/opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/objdump -d $1.bin >$1.dump
+/opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/objdump -zD $1.bin >$1.dump
 
 ### crea memory.hex
