module MajorityVoter (A, B, C, out ,fault1, fault0);
	input A,B,C;
	input fault1, fault0;
	output out;
	wor wi1, wi2, wi3;
	wor out;
	// fault1=0 fault0=0 output fault free
	// fault1=1 fault0=0 output S a B
	// fault1=0(1) fault0=1 output Maj(A',B,C')
	assign wi1 = (A & B) | (B & C) | (A & C);
	assign wi3 = (~A & B) | (B & ~C) | (~A & ~C);
	assign wi2 = (fault1) ? B : wi1;
	assign out = (fault0) ?  wi3: wi2;
endmodule