# # ChangeLog for trunk/synplicity/rev_1 in XOpenSparcT1 # # Generated by Trac 0.12.2 # 11/15/24 10:36:46 Wed, 06 Apr 2011 14:06:24 GMT pntsvt00 [31] * trunk/Xilinx/coregen/coregen.cgc (modified) * trunk/synplicity/rev_1/W1.ucf (modified) * trunk/synplicity/rev_1/dram_fifo.ngc (modified) checkpoint: synthesis fail Tue, 05 Apr 2011 16:45:26 GMT pntsvt00 [29] * trunk/Xilinx/coregen (added) * trunk/Xilinx/coregen/coregen.cgc (added) * trunk/Xilinx/coregen/coregen.cgp (added) * trunk/synplicity/rev_1/pcx_fifo.ngc (modified) * trunk/synplicity/rev_1/run_ise.tcl (modified) * trunk/synplicity/rev_1/synplicity.ucf (modified) added coregen files to recreate ngc from xco Tue, 05 Apr 2011 12:09:24 GMT pntsvt00 [28] * trunk/synplicity/proj_1.prj (modified) * trunk/synplicity/rev_1/run_ise.tcl (modified) Aggiornato prj per sinplify Tue, 22 Mar 2011 20:08:58 GMT pntsvt00 [10] * README.TXT (added) * trunk/Top/W1.v (modified) * trunk/WB2ALTDDR3/dram_wb.v (modified) * trunk/Xilinx/cachedir.v (added) * trunk/Xilinx/ddr2_chipscope.v (added) * trunk/Xilinx/ddr2_ctrl.v (added) * trunk/Xilinx/ddr2_idelay_ctrl.v (added) * trunk/Xilinx/ddr2_infrastructure.v (added) * trunk/Xilinx/ddr2_mem_if_top.v (added) * trunk/Xilinx/ddr2_phy_calib.v (added) * trunk/Xilinx/ddr2_phy_ctl_io.v (added) * trunk/Xilinx/ddr2_phy_dm_iob.v (added) * trunk/Xilinx/ddr2_phy_dq_iob.v (added) * trunk/Xilinx/ddr2_phy_dqs_iob.v (added) * trunk/Xilinx/ddr2_phy_init.v (added) * trunk/Xilinx/ddr2_phy_io.v (added) * trunk/Xilinx/ddr2_phy_top.v (added) * trunk/Xilinx/ddr2_phy_write.v (added) * trunk/Xilinx/ddr2_top.v (added) * trunk/Xilinx/ddr2_usr_addr_fifo.v (added) * trunk/Xilinx/ddr2_usr_rd.v (added) * trunk/Xilinx/ddr2_usr_top.v (added) * trunk/Xilinx/ddr2_usr_wr.v (added) * trunk/Xilinx/dram.v (added) * trunk/Xilinx/pll.v (modified) * trunk/os2wb/os2wb.v (modified) * trunk/os2wb/s1_top.v (modified) * trunk/sim (added) * trunk/sim/ddr2_model.v (added) * trunk/sim/ddr2_model_parameters.vh (added) * trunk/sim/sim.do (added) * trunk/sim/sim_tb_top.v (added) * trunk/sim/sim_tb_top.vhd (added) * trunk/sim/wiredly.v (added) * trunk/sim/wiredly.vhd (added) * trunk/synplicity/proj_1.prj (modified) * trunk/synplicity/rev_1/W1.ucf (added) * trunk/synplicity/rev_1/dram_fifo.ngc (added) * trunk/synplicity/rev_1/pcx_fifo.ngc (added) * trunk/synplicity/rev_1/run_ise.tcl (added) * trunk/synplicity/rev_1/run_xise.tcl (added) * trunk/synplicity/rev_1/synplicity.ucf (added) versione sintetizzabile Tue, 22 Mar 2011 11:52:42 GMT pntsvt00 [9] * trunk/synplicity/rev_1 (added) * trunk/synplicity/rev_1/W1.ucf (added) * trunk/synplicity/rev_1/run_xise.tcl (added) modifiche per la sintesi su Xilinx