`timescale 1ns/1ps 


//*********************************************************
module Test_MQCAcell;
//*********************************************************
parameter reset=2'b00;
parameter switch=2'b01;
parameter hold=2'b10;  

wire v [9:0];
reg [1:0] s [3:0]; 
wire   in1,in2,in3;
reg   rin1,rin2,rin3;
wire  out1;
   
// Instantiate the cells 
//	input  N, E, S, W;
//QCAcell Q11(v(1,2), v(2,2), v(2,1), v(2,0), v(1,0), v(0,0),v(0,1),v(0,2), v(1,1),s(1,1));
/*				N(in2)
		0	1	2	3	4	5
	0			X
	1			X
W(in1)	2	X	X	X	X	X	X	E
	3			X
	4			X
	5			X
				S
*/
MQCAcell Q20(nocell, v[0], nocell, in1, s[0]); //input 1
MQCAcell Q21(nocell, v[1], nocell, v[0],s[0]); //wire 

MQCAcell Q02(in2, nocell, v[2],nocell, s[0]); //input 2
MQCAcell Q12(v[2], nocell,v[3], nocell, s[0]); //wire
MQCAcell Q22(v[3], v[4], v[5], v[1], s[0]); //maj
MQCAcell Q32(v[5], nocell, v[6], nocell, s[0]); //wire
MQCAcell Q42(v[6], nocell, v[7], nocell, s[0]); //wire
MQCAcell Q52(v[7], nocell, in3, nocell, s[0]); //input 3

MQCAcell Q23(nocell, v[8], nocell, v[4], s[0]); //wire
MQCAcell Q24(nocell, v[9], nocell, v[8],s[0]); //wire 
MQCAcell Q25(nocell, out1, nocell, v[9],s[0]); //output 


always #30 s[0] = (s[0] + 1) % 3;
always #30 s[1] = (s[1] + 1) % 3;
always #30 s[2] = (s[2] + 1) % 3;

assign in1 = rin1;
assign in2 = rin2;
assign in3 = rin3;


initial
 begin
 $dumpvars(0,Test_MQCAcell); //dice fino a che livello fare il dump dei segnali

rin1 = 1'b0;	// time = 0
rin2 = 1'b0;
rin3 = 1'b0;

 s[2] =switch;
 s[1] =hold;
 s[0] =reset;
    
rin1 <= #10 1'b1;
rin2 <= #10 1'b1;
rin3 = #10 1'b1;
rin3 = #300 1'b1;


 $finish;


 end 

endmodule