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1 | //`timescale 10ns/100ps |
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2 | module test_benchLBMEM_new; |
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3 | |
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4 | wire m8,m1,m2,m3,m4,m5,m6,m7,z; |
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5 | reg x,y,nodefake, nodefake2, nodefake3; |
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6 | reg [1:0] zone1,zone2,zone3; |
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7 | parameter [1:0] |
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8 | switch=1, |
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9 | hold=2, |
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10 | rele=3, |
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11 | relax=0; |
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12 | assign m8= nodefake; |
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13 | assign z= nodefake2; |
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14 | assign out= nodefake2; |
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15 | assign m3 = nodefake2; |
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16 | assign m4 = nodefake2; |
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17 | assign m1 = nodefake2; |
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18 | |
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19 | Wire_4 W1 ( |
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20 | .A(x), |
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21 | .B(m1), |
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22 | .status(zone1) |
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23 | ); |
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24 | |
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25 | Wire_4 W2 ( |
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26 | .A(y), |
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27 | .B(m7), |
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28 | .status(zone1) |
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29 | ); |
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30 | |
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31 | Wire_bi6 WBI1 ( |
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32 | .A(z), |
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33 | .B(m3), |
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34 | .status(zone1), |
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35 | .fault(0) |
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36 | ); |
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37 | |
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38 | MajorityVoter_bi4 MV1 ( |
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39 | .A(m1), |
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40 | .B(m5), |
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41 | .Zp(m4), |
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42 | .Z(m2), |
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43 | .status(zone2), |
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44 | .fault1(1'b0), |
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45 | .fault0(1'b0) |
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46 | ); |
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47 | |
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48 | Wire_bi6 W4 ( |
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49 | .A(m4), |
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50 | .B(m8), |
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51 | .status(zone2), |
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52 | .fault(0) |
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53 | ); |
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54 | |
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55 | Wire_bi6 W5 ( |
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56 | .A(m8), |
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57 | .B(out), |
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58 | .status(zone3), |
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59 | .fault(0) |
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60 | ); |
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61 | |
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62 | LShapedWire_bi4 LSBI1( |
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63 | .A(m2), |
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64 | .B(m3), |
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65 | .fault(1'b0), |
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66 | .status(zone2) |
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67 | ); |
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68 | |
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69 | LShapedWire_4 LS1 ( |
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70 | .A(m7), |
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71 | .B(m5), |
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72 | .status(zone2), |
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73 | .fault(1'b0) |
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74 | ); |
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75 | |
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76 | |
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77 | initial |
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78 | begin |
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79 | x =0; |
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80 | y =0; |
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81 | zone1<=2; |
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82 | zone2<=2; |
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83 | zone3<=3; |
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84 | nodefake <=0; |
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85 | nodefake3 <=1'bz; |
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86 | nodefake2 <=1'bz; |
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87 | #110 nodefake <=1'bz; |
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88 | end |
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89 | always |
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90 | begin |
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91 | #50 x <=1; |
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92 | #0 y <=1; |
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93 | #200 x <=0; |
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94 | #0 y <=1; |
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95 | #200 x <=0; |
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96 | #0 y <=0; |
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97 | #200 x <=1; |
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98 | #0 y <=0; |
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99 | #200 x <=0; |
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100 | #0 y<=1; |
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101 | end |
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102 | //period=200 |
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103 | always@(zone1) |
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104 | begin |
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105 | case (zone1) |
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106 | hold : #100 zone1 <= zone1 +1; |
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107 | rele : #25 zone1 <= zone1 +1 ; |
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108 | relax : #50 zone1 <= zone1 +1; |
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109 | switch : #25 zone1 <= zone1 +1 ; |
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110 | endcase |
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111 | end |
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112 | |
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113 | always@(zone2) |
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114 | begin |
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115 | #25 zone2 <= zone2 +1 ; |
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116 | end |
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117 | |
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118 | always@(zone3) |
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119 | begin |
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120 | case (zone3) |
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121 | hold : #75 zone3 <= zone3 +1; |
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122 | rele : #25 zone3 <= zone3 +1; |
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123 | relax : #75 zone3 <= zone3 +1; |
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124 | switch : #25 zone3 <= zone3 +1; |
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125 | endcase |
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126 | end |
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127 | |
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128 | endmodule |
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129 | |
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130 | |
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131 | |
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132 | |
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