source:
HDLQ/TestBenches/TBpermanent2.v
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| Revision 1, 5.0 KB checked in by ttvmrc00, 15 years ago (diff) | |
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| [1] | 1 | //`timescale 10ns/100ps |
| 2 | module test_benchpermanent2; | |
| 3 | wor m1,m2,m3,m4,m5,m6,m7,m8,m9,m10,m11,m12,m13,m14,m16,m17,m18,m19,m21,m23,m24,m25,m22,m28,m26,m29,m30,m31,m32,m33,m34; | |
| 4 | ||
| 5 | reg d_in1, d_in2; | |
| 6 | reg fault_1,fault_2,fault_3,fault_4,fault_5,fault_6; | |
| 7 | reg [1:0] zone1,zone2,zone3,zone4; | |
| 8 | parameter [1:0] | |
| 9 | switch=1, | |
| 10 | hold=2, | |
| 11 | rele=3, | |
| 12 | relax=0; | |
| 13 | ||
| 14 | assign x=d_in1; | |
| 15 | assign y=d_in2; | |
| 16 | //assign m20 = 1'b0; | |
| 17 | //assign m10 = 1'b0; | |
| 18 | assign fakenode =1'bz; | |
| 19 | //assign m1 = fakenode; | |
| 20 | //assign m2 = fakenode; | |
| 21 | //assign m3 = fakenode; | |
| 22 | //assign m4 = fakenode; | |
| 23 | //assign m5 = fakenode; | |
| 24 | //assign m6 = fakenode; | |
| 25 | //assign m7 = fakenode; | |
| 26 | //assign m8 = fakenode; | |
| 27 | //assign m9 = fakenode; | |
| 28 | //assign m10 = fakenode; | |
| 29 | //assign m11 = fakenode; | |
| 30 | //assign m12 = fakenode; | |
| 31 | //assign m13 = fakenode; | |
| 32 | //assign m28 = fakenode; | |
| 33 | //assign m15 = fakenode; | |
| 34 | //assign m16 = fakenode; | |
| 35 | //assign m17 = fakenode; | |
| 36 | //assign m18 = fakenode; | |
| 37 | //assign m19 = fakenode; | |
| 38 | //assign m20 = fakenode; | |
| 39 | //assign m21 = fakenode; | |
| 40 | //assign m22 = fakenode; | |
| 41 | //assign m23 = fakenode; | |
| 42 | //assign m24 = fakenode; | |
| 43 | //assign m25 = fakenode; | |
| 44 | //assign m26 = fakenode; | |
| 45 | //assign m29 = fakenode; | |
| 46 | //assign m30 = fakenode; | |
| 47 | //assign m31 = fakenode; | |
| 48 | //assign m32 = fakenode; | |
| 49 | //assign m33 = fakenode; | |
| 50 | //assign m34 = fakenode; | |
| 51 | ||
| 52 | Wire_bi6 W1 ( | |
| 53 | .A(x), | |
| 54 | .B(m1), | |
| 55 | .fault(1'b0), | |
| 56 | .status(zone1) | |
| 57 | ); | |
| 58 | Fanout_A4 FO1( | |
| 59 | .A(m1), | |
| 60 | .B(m4), | |
| 61 | .C(m2), | |
| 62 | .fault(1'b0), | |
| 63 | .status(zone2) | |
| 64 | ); | |
| 65 | ||
| 66 | Wire_bi6 W2 ( | |
| 67 | .A(m4), | |
| 68 | .B(m5), | |
| 69 | .fault(1'b0), | |
| 70 | .status(zone2) | |
| 71 | ); | |
| 72 | ||
| 73 | Wire_bi6 W3 ( | |
| 74 | .A(m2), | |
| 75 | .B(m3), | |
| 76 | .fault(1'b0), | |
| 77 | .status(zone2) | |
| 78 | ); | |
| 79 | ||
| 80 | //Wire_bi6 prova2 ( | |
| 81 | // .A(m3), | |
| 82 | // .B(m24), | |
| 83 | // .fault(1'b0), | |
| 84 | // .status(zone3) | |
| 85 | // ); | |
| 86 | Inverter_new IN1 ( | |
| 87 | .A(m3), | |
| 88 | .B(m24), | |
| 89 | .status(zone3), | |
| 90 | .fault(1'b0)); | |
| 91 | ||
| 92 | Wire_bi6 W4 ( | |
| 93 | .A(m24), | |
| 94 | .B(m23), | |
| 95 | .fault(1'b0), | |
| 96 | .status(zone4) | |
| 97 | ); | |
| 98 | ||
| 99 | LShapedWire_4 LSW1( | |
| 100 | .A(m5), | |
| 101 | .B(m6), | |
| 102 | .fault(1'b0), | |
| 103 | .status(zone3) | |
| 104 | ); | |
| 105 | ||
| 106 | ||
| 107 | Wire_bi6 W5 ( | |
| 108 | .A(m6), | |
| 109 | .B(m7), | |
| 110 | .fault(1'b0), | |
| 111 | .status(zone3) | |
| 112 | ); | |
| 113 | ||
| 114 | Wire_bi6 W6 ( | |
| 115 | .A(y), | |
| 116 | .B(m26), | |
| 117 | .fault(1'b0), | |
| 118 | .status(zone1) | |
| 119 | ); | |
| 120 | ||
| 121 | ||
| 122 | Fanout_A4 FO2( | |
| 123 | .A(m26), | |
| 124 | .B(m25), | |
| 125 | .C(m28), | |
| 126 | .fault(1'b0), | |
| 127 | .status(zone2) | |
| 128 | ); | |
| 129 | ||
| 130 | Wire_bi6 W7 ( | |
| 131 | .A(m28), | |
| 132 | .B(m29), | |
| 133 | .fault(1'b0), | |
| 134 | .status(zone2) | |
| 135 | ); | |
| 136 | ||
| 137 | LShapedWire_4 LSW4( | |
| 138 | .A(m29), | |
| 139 | .B(m30), | |
| 140 | .fault(1'b0), | |
| 141 | .status(zone2) | |
| 142 | ); | |
| 143 | ||
| 144 | Wire_bi6 W8 ( | |
| 145 | .A(m25), | |
| 146 | .B(m22), | |
| 147 | .fault(1'b0), | |
| 148 | .status(zone3) | |
| 149 | ); | |
| 150 | ||
| 151 | Inverter_new IN2 ( | |
| 152 | .A(m30), | |
| 153 | .B(m31), | |
| 154 | .status(zone3), | |
| 155 | .fault(1'b0) | |
| 156 | ); | |
| 157 | //Wire_bi6 prova1 ( | |
| 158 | // .A(m30), | |
| 159 | // .B(m31), | |
| 160 | // .fault(1'b0), | |
| 161 | // .status(zone3) | |
| 162 | // ); | |
| 163 | ||
| 164 | Wire_bi6 W9 ( | |
| 165 | .A(m31), | |
| 166 | .B(m32), | |
| 167 | .fault(1'b0), | |
| 168 | .status(zone4) | |
| 169 | ); | |
| 170 | ||
| 171 | Wire_bi6 W10 ( | |
| 172 | .A(m7), | |
| 173 | .B(m8), | |
| 174 | .fault(1'b0), | |
| 175 | .status(zone4) | |
| 176 | ); | |
| 177 | ||
| 178 | LShapedWire_4 LSW2( | |
| 179 | .A(m8), | |
| 180 | .B(m9), | |
| 181 | .fault(1'b0), | |
| 182 | .status(zone4) | |
| 183 | ); | |
| 184 | ||
| 185 | LShapedWire_4 LSW3( | |
| 186 | .A(m22), | |
| 187 | .B(m21), | |
| 188 | .fault(1'b0), | |
| 189 | .status(zone4) | |
| 190 | ); | |
| 191 | ||
| 192 | Wire_4 Wm10( | |
| 193 | .A(1'b0), | |
| 194 | .B(m10), | |
| 195 | .status(zone4) | |
| 196 | ); | |
| 197 | ||
| 198 | assign m20 =1'b0; | |
| 199 | MajorityVoter_bi4 MV1 ( | |
| 200 | .A(m23), | |
| 201 | .B(m20), | |
| 202 | .Zp(m19), | |
| 203 | .Z(m21), | |
| 204 | .status(zone1), | |
| 205 | .fault1(1'b0), | |
| 206 | .fault0(1'b0) | |
| 207 | ); | |
| 208 | ||
| 209 | Wire_4 Wm20( | |
| 210 | .A(1'b0), | |
| 211 | .B(m20), | |
| 212 | .status(zone4) | |
| 213 | ); | |
| 214 | assign m10 =1'b0; | |
| 215 | MajorityVoter_bi4 MV2 ( | |
| 216 | .A(m32), | |
| 217 | .B(m10), | |
| 218 | .Zp(m11), | |
| 219 | .Z(m9), | |
| 220 | .status(zone1), | |
| 221 | .fault1(1'b0), | |
| 222 | .fault0(1'b0) | |
| 223 | ); | |
| 224 | ||
| 225 | LShapedWire_4 LSW5( | |
| 226 | .A(m12), | |
| 227 | .B(m13), | |
| 228 | .fault(1'b0), | |
| 229 | .status(zone2) | |
| 230 | ); | |
| 231 | ||
| 232 | ||
| 233 | Wire_bi6 W11 ( | |
| 234 | .A(m11), | |
| 235 | .B(m12), | |
| 236 | .fault(1'b0), | |
| 237 | .status(zone2) | |
| 238 | ); | |
| 239 | ||
| 240 | Wire_bi6 W12 ( | |
| 241 | .A(m13), | |
| 242 | .B(m14), | |
| 243 | .fault(1'b0), | |
| 244 | .status(zone2) | |
| 245 | ); | |
| 246 | ||
| 247 | Wire_4 Wm50( | |
| 248 | .A(1'b1), | |
| 249 | .B(m50), | |
| 250 | .status(zone2) | |
| 251 | ); | |
| 252 | ||
| 253 | assign m15 =1'b1; | |
| 254 | MajorityVoter_4 MV3 ( | |
| 255 | .B(m15), | |
| 256 | .A(m14), | |
| 257 | .Zp(m17), | |
| 258 | .C(m16), | |
| 259 | .status(zone3), | |
| 260 | .fault1(1'b1), | |
| 261 | .fault0(1'b0) | |
| 262 | ); | |
| 263 | ||
| 264 | LShapedWire_4 LSW6( | |
| 265 | .A(m18), | |
| 266 | .B(m16), | |
| 267 | .fault(1'b0), | |
| 268 | .status(zone2) | |
| 269 | ); | |
| 270 | ||
| 271 | ||
| 272 | Wire_bi6 W13 ( | |
| 273 | .A(m19), | |
| 274 | .B(m18), | |
| 275 | .fault(1'b0), | |
| 276 | .status(zone2) | |
| 277 | ); | |
| 278 | ||
| 279 | Wire_bi6 W14 ( | |
| 280 | .A(m17), | |
| 281 | .B(m33), | |
| 282 | .fault(1'b0), | |
| 283 | .status(zone4) | |
| 284 | ); | |
| 285 | ||
| 286 | Wire_bi6 W15 ( | |
| 287 | .A(m33), | |
| 288 | .B(m34), | |
| 289 | .fault(1'b0), | |
| 290 | .status(zone1) | |
| 291 | ); | |
| 292 | initial | |
| 293 | begin | |
| 294 | d_in1<=1; | |
| 295 | d_in2 <=0; | |
| 296 | zone1 <=relax; | |
| 297 | zone2 <=rele; | |
| 298 | zone3 <=hold; | |
| 299 | zone4 <=switch; | |
| 300 | fault_1 <=0; | |
| 301 | fault_2 <=0; | |
| 302 | fault_3 <=0; | |
| 303 | fault_4 <=0; | |
| 304 | fault_5 <=0; | |
| 305 | fault_6 <=0; | |
| 306 | end | |
| 307 | ||
| 308 | always | |
| 309 | begin | |
| 310 | #349 d_in1 <=~d_in1; | |
| 311 | //#0 y <=1; | |
| 312 | #201 d_in2 <=~d_in2; | |
| 313 | // #0 x <=1; | |
| 314 | //#200 x <=0; | |
| 315 | // #0 y <=0; | |
| 316 | // #200 w <=1; | |
| 317 | // #0 y <=1; | |
| 318 | // #200 x <=0; | |
| 319 | // #0 y<=1; | |
| 320 | end | |
| 321 | //always | |
| 322 | // begin | |
| 323 | // #230 fault_4 <= ~fault_4; | |
| 324 | // #150 fault_4 <= ~fault_4; | |
| 325 | // end | |
| 326 | //period=200 | |
| 327 | ||
| 328 | always@(zone1) | |
| 329 | begin | |
| 330 | #25 zone1 <= zone1 +1 ; | |
| 331 | end | |
| 332 | always@(zone2) | |
| 333 | begin | |
| 334 | #25 zone2 <= zone2 +1 ; | |
| 335 | end | |
| 336 | always@(zone3) | |
| 337 | begin | |
| 338 | #25 zone3 <= zone3 +1 ; | |
| 339 | end | |
| 340 | always@(zone4) | |
| 341 | begin | |
| 342 | #25 zone4 <= zone4 +1 ; | |
| 343 | end | |
| 344 | endmodule | |
| 345 | ||
| 346 | ||
| 347 | ||
| 348 |
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