[6] | 1 | // ========== Copyright Header Begin ========================================== |
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| 2 | // |
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| 3 | // OpenSPARC T1 Processor File: sparc_exu_ecl_cnt6.v |
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| 4 | // Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. |
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| 5 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. |
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| 6 | // |
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| 7 | // The above named program is free software; you can redistribute it and/or |
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| 8 | // modify it under the terms of the GNU General Public |
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| 9 | // License version 2 as published by the Free Software Foundation. |
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| 10 | // |
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| 11 | // The above named program is distributed in the hope that it will be |
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| 12 | // useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 14 | // General Public License for more details. |
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| 15 | // |
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| 16 | // You should have received a copy of the GNU General Public |
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| 17 | // License along with this work; if not, write to the Free Software |
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| 18 | // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. |
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| 19 | // |
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| 20 | // ========== Copyright Header End ============================================ |
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| 21 | //////////////////////////////////////////////////////////////////////// |
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| 22 | /* |
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| 23 | // Module Name: sparc_exu_cnt6 |
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| 24 | // Description: 6 bit binary counter |
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| 25 | */ |
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| 26 | module sparc_exu_ecl_cnt6 (/*AUTOARG*/ |
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| 27 | // Outputs |
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| 28 | cntr, |
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| 29 | // Inputs |
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| 30 | reset, clk, se |
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| 31 | ) ; |
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| 32 | input reset; |
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| 33 | input clk; |
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| 34 | input se; |
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| 35 | |
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| 36 | output [5:0] cntr; |
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| 37 | |
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| 38 | wire [5:0] next_cntr; |
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| 39 | wire tog1; |
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| 40 | wire tog2; |
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| 41 | wire tog3; |
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| 42 | wire tog4; |
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| 43 | wire tog5; |
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| 44 | |
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| 45 | assign tog1 = cntr[0]; |
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| 46 | assign tog2 = cntr[0] & cntr[1]; |
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| 47 | assign tog3 = cntr[0] & cntr[1] & cntr[2]; |
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| 48 | assign tog4 = cntr[0] & cntr[1] & cntr[2] & cntr[3]; |
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| 49 | assign tog5 = cntr[0] & cntr[1] & cntr[2] & cntr[3] & cntr[4]; |
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| 50 | assign next_cntr[0] = ~reset & ~cntr[0]; |
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| 51 | assign next_cntr[1] = ~reset & ((~cntr[1] & tog1) | (cntr[1] & ~tog1)); |
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| 52 | assign next_cntr[2] = ~reset & ((~cntr[2] & tog2) | (cntr[2] & ~tog2)); |
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| 53 | assign next_cntr[3] = ~reset & ((~cntr[3] & tog3) | (cntr[3] & ~tog3)); |
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| 54 | assign next_cntr[4] = ~reset & ((~cntr[4] & tog4) | (cntr[4] & ~tog4)); |
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| 55 | assign next_cntr[5] = ~reset & ((~cntr[5] & tog5) | (cntr[5] & ~tog5)); |
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| 56 | |
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| 57 | |
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| 58 | // counter flop |
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| 59 | dff_s #(6) cntr_dff(.din(next_cntr[5:0]), .clk(clk), .q(cntr[5:0]), .se(se), .si(), .so()); |
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| 60 | endmodule // sparc_exu_ecl_cnt6 |
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