source: XOpenSparcT1/trunk/T1-CPU/exu/sparc_exu_ecl_cnt6.v @ 6

Revision 6, 2.2 KB checked in by pntsvt00, 13 years ago (diff)

versione iniziale opensparc

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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T1 Processor File: sparc_exu_ecl_cnt6.v
4// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
5// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
6//
7// The above named program is free software; you can redistribute it and/or
8// modify it under the terms of the GNU General Public
9// License version 2 as published by the Free Software Foundation.
10//
11// The above named program is distributed in the hope that it will be
12// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14// General Public License for more details.
15//
16// You should have received a copy of the GNU General Public
17// License along with this work; if not, write to the Free Software
18// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
19//
20// ========== Copyright Header End ============================================
21////////////////////////////////////////////////////////////////////////
22/*
23//  Module Name: sparc_exu_cnt6
24//      Description: 6 bit binary counter
25*/
26module sparc_exu_ecl_cnt6 (/*AUTOARG*/
27   // Outputs
28   cntr, 
29   // Inputs
30   reset, clk, se
31   ) ;
32   input reset;
33   input clk;
34   input se;
35   
36   output [5:0] cntr;
37
38   wire [5:0]   next_cntr;
39   wire         tog1;
40   wire         tog2;
41   wire         tog3;
42   wire         tog4;
43   wire         tog5;
44
45   assign       tog1 = cntr[0];
46   assign       tog2 = cntr[0] & cntr[1];
47   assign       tog3 = cntr[0] & cntr[1] & cntr[2];
48   assign       tog4 = cntr[0] & cntr[1] & cntr[2] & cntr[3];
49   assign       tog5 = cntr[0] & cntr[1] & cntr[2] & cntr[3] & cntr[4];
50   assign next_cntr[0] = ~reset & ~cntr[0];
51   assign next_cntr[1] = ~reset & ((~cntr[1] & tog1) | (cntr[1] & ~tog1)); 
52   assign next_cntr[2] = ~reset & ((~cntr[2] & tog2) | (cntr[2] & ~tog2)); 
53   assign next_cntr[3] = ~reset & ((~cntr[3] & tog3) | (cntr[3] & ~tog3)); 
54   assign next_cntr[4] = ~reset & ((~cntr[4] & tog4) | (cntr[4] & ~tog4)); 
55   assign next_cntr[5] = ~reset & ((~cntr[5] & tog5) | (cntr[5] & ~tog5)); 
56   
57
58   // counter flop
59   dff_s #(6) cntr_dff(.din(next_cntr[5:0]), .clk(clk), .q(cntr[5:0]), .se(se), .si(), .so());
60endmodule // sparc_exu_ecl_cnt6
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