source: XOpenSparcT1/trunk/T1-FPU/fpu_cnt_lead0_lvl1.v @ 6

Revision 6, 1.7 KB checked in by pntsvt00, 14 years ago (diff)

versione iniziale opensparc

Line 
1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T1 Processor File: fpu_cnt_lead0_lvl1.v
4// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
5// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
6//
7// The above named program is free software; you can redistribute it and/or
8// modify it under the terms of the GNU General Public
9// License version 2 as published by the Free Software Foundation.
10//
11// The above named program is distributed in the hope that it will be
12// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14// General Public License for more details.
15//
16// You should have received a copy of the GNU General Public
17// License along with this work; if not, write to the Free Software
18// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
19//
20// ========== Copyright Header End ============================================
21///////////////////////////////////////////////////////////////////////////////
22//
23//      Lowest level of lead 0 counters.  Lead 0 count for 4 bits.
24//
25///////////////////////////////////////////////////////////////////////////////
26
27module fpu_cnt_lead0_lvl1 (
28        din,
29
30        din_3_0_eq_0,
31        din_3_2_eq_0,
32        lead0_4b_0
33);
34
35
36input [3:0]     din;                    // data for lead 0 count bits[3:0]
37
38output          din_3_0_eq_0;           // data in[3:0] is zero
39output          din_3_2_eq_0;           // data in[3:2] is zero
40output          lead0_4b_0;             // bit[0] of lead 0 count
41
42
43wire            din_3_0_eq_0;
44wire            din_3_2_eq_0;
45wire            lead0_4b_0;
46
47
48assign din_3_0_eq_0= (!(|din[3:0]));
49
50assign din_3_2_eq_0= (!(|din[3:2]));
51
52assign lead0_4b_0= ((!din_3_2_eq_0) && (!din[3]))
53                || (din_3_2_eq_0 && (!din[1]));
54
55endmodule
56
57
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