[6] | 1 | // ========== Copyright Header Begin ========================================== |
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| 2 | // |
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| 3 | // OpenSPARC T1 Processor File: fpu_cnt_lead0_lvl2.v |
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| 4 | // Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. |
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| 5 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. |
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| 6 | // |
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| 7 | // The above named program is free software; you can redistribute it and/or |
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| 8 | // modify it under the terms of the GNU General Public |
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| 9 | // License version 2 as published by the Free Software Foundation. |
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| 10 | // |
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| 11 | // The above named program is distributed in the hope that it will be |
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| 12 | // useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 14 | // General Public License for more details. |
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| 15 | // |
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| 16 | // You should have received a copy of the GNU General Public |
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| 17 | // License along with this work; if not, write to the Free Software |
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| 18 | // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. |
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| 19 | // |
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| 20 | // ========== Copyright Header End ============================================ |
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| 21 | /////////////////////////////////////////////////////////////////////////////// |
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| 22 | // |
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| 23 | // 2nd level of lead 0 counters. Lead 0 count for 8 bits. |
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| 24 | // |
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| 25 | /////////////////////////////////////////////////////////////////////////////// |
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| 26 | |
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| 27 | module fpu_cnt_lead0_lvl2 ( |
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| 28 | din_7_4_eq_0, |
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| 29 | din_7_6_eq_0, |
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| 30 | lead0_4b_0_hi, |
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| 31 | din_3_0_eq_0, |
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| 32 | din_3_2_eq_0, |
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| 33 | lead0_4b_0_lo, |
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| 34 | |
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| 35 | din_7_0_eq_0, |
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| 36 | lead0_8b_1, |
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| 37 | lead0_8b_0 |
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| 38 | ); |
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| 39 | |
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| 40 | |
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| 41 | input din_7_4_eq_0; // data in[7:4] is zero |
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| 42 | input din_7_6_eq_0; // data in[7:6] is zero |
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| 43 | input lead0_4b_0_hi; // bit[0] of lead 0 count- data in[7:4] |
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| 44 | input din_3_0_eq_0; // data in[3:0] is zero |
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| 45 | input din_3_2_eq_0; // data in[3:2] is zero |
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| 46 | input lead0_4b_0_lo; // bit[0] of lead 0 count- data in[3:0] |
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| 47 | |
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| 48 | output din_7_0_eq_0; // data in[7:0] is zero |
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| 49 | output lead0_8b_1; // bit[1] of lead 0 count |
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| 50 | output lead0_8b_0; // bit[0] of lead 0 count |
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| 51 | |
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| 52 | wire din_7_0_eq_0; |
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| 53 | wire lead0_8b_1; |
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| 54 | wire lead0_8b_0; |
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| 55 | |
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| 56 | |
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| 57 | assign din_7_0_eq_0= din_3_0_eq_0 && din_7_4_eq_0; |
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| 58 | |
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| 59 | assign lead0_8b_1= ((!din_7_4_eq_0) && din_7_6_eq_0) |
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| 60 | || (din_7_4_eq_0 && din_3_2_eq_0); |
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| 61 | |
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| 62 | assign lead0_8b_0= ((!din_7_4_eq_0) && lead0_4b_0_hi) |
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| 63 | || (din_7_4_eq_0 && lead0_4b_0_lo); |
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| 64 | |
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| 65 | |
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| 66 | endmodule |
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| 67 | |
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| 68 | |
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