source: XOpenSparcT1/trunk/T1-FPU/fpu_denorm_3b.v @ 6

Revision 6, 1.8 KB checked in by pntsvt00, 13 years ago (diff)

versione iniziale opensparc

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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T1 Processor File: fpu_denorm_3b.v
4// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
5// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
6//
7// The above named program is free software; you can redistribute it and/or
8// modify it under the terms of the GNU General Public
9// License version 2 as published by the Free Software Foundation.
10//
11// The above named program is distributed in the hope that it will be
12// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14// General Public License for more details.
15//
16// You should have received a copy of the GNU General Public
17// License along with this work; if not, write to the Free Software
18// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
19//
20// ========== Copyright Header End ============================================
21///////////////////////////////////////////////////////////////////////////////
22//
23//      Three bit comparison of two inputs when both will always have
24//              leading 0s.
25//
26///////////////////////////////////////////////////////////////////////////////
27
28module fpu_denorm_3b (
29        din1,
30        din2,
31
32        din2_din1_nz,
33        din2_din1_denorm
34);
35
36
37input [2:0]     din1;                   // input 1- 3 bits
38input [2:0]     din2;                   // input 2- 3 bits
39
40output          din2_din1_nz;           // input 1 and input 2 are not 0
41output          din2_din1_denorm;       // input 1 is a denorm
42
43
44wire [2:0]      din2_din1_zero;
45wire            din2_din1_nz;
46wire            din2_din1_denorm;
47
48
49assign din2_din1_zero[2:0]= (~(din1 | din2));
50
51assign din2_din1_nz= (!(&din2_din1_zero[2:0]));
52
53assign din2_din1_denorm= din2[2]
54                || (din2_din1_zero[2] && din2[1])
55                || ((&din2_din1_zero[2:1]) && din2[0]);
56
57
58endmodule
59
60
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