1 | // ========== Copyright Header Begin ========================================== |
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2 | // |
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3 | // OpenSPARC T1 Processor File: test_stub_scan.v |
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4 | // Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. |
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5 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. |
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6 | // |
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7 | // The above named program is free software; you can redistribute it and/or |
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8 | // modify it under the terms of the GNU General Public |
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9 | // License version 2 as published by the Free Software Foundation. |
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10 | // |
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11 | // The above named program is distributed in the hope that it will be |
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12 | // useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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14 | // General Public License for more details. |
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15 | // |
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16 | // You should have received a copy of the GNU General Public |
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17 | // License along with this work; if not, write to the Free Software |
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18 | // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. |
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19 | // |
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20 | // ========== Copyright Header End ============================================ |
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21 | // ____________________________________________________________________________ |
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22 | // |
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23 | // test_stub_bist - Test Stub with Scan Support |
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24 | // ____________________________________________________________________________ |
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25 | // |
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26 | // Description: DBB interface for test signal generation |
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27 | // ____________________________________________________________________________ |
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28 | |
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29 | module test_stub_scan (/*AUTOARG*/ |
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30 | // Outputs |
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31 | mux_drive_disable, mem_write_disable, sehold, se, testmode_l, |
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32 | mem_bypass, so_0, so_1, so_2, |
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33 | // Inputs |
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34 | ctu_tst_pre_grst_l, arst_l, global_shift_enable, |
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35 | ctu_tst_scan_disable, ctu_tst_scanmode, ctu_tst_macrotest, |
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36 | ctu_tst_short_chain, long_chain_so_0, short_chain_so_0, |
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37 | long_chain_so_1, short_chain_so_1, long_chain_so_2, short_chain_so_2 |
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38 | ); |
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39 | |
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40 | input ctu_tst_pre_grst_l; |
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41 | input arst_l; // no longer used |
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42 | input global_shift_enable; |
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43 | input ctu_tst_scan_disable; // redefined as pin_based_scan |
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44 | input ctu_tst_scanmode; |
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45 | input ctu_tst_macrotest; |
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46 | input ctu_tst_short_chain; |
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47 | input long_chain_so_0; |
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48 | input short_chain_so_0; |
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49 | input long_chain_so_1; |
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50 | input short_chain_so_1; |
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51 | input long_chain_so_2; |
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52 | input short_chain_so_2; |
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53 | |
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54 | output mux_drive_disable; |
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55 | output mem_write_disable; |
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56 | output sehold; |
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57 | output se; |
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58 | output testmode_l; |
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59 | output mem_bypass; |
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60 | output so_0; |
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61 | output so_1; |
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62 | output so_2; |
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63 | |
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64 | wire pin_based_scan; |
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65 | wire short_chain_en; |
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66 | wire short_chain_select; |
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67 | |
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68 | // INTERNAL CLUSTER CONNECTIONS |
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69 | // |
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70 | // Scan Chain Hookup |
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71 | // ================= |
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72 | // |
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73 | // Scan chains have two configurations: long and short. |
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74 | // The short chain is typically the first tenth of the |
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75 | // long chain. The short chain should contain memory |
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76 | // collar flops for deep arrays. The CTU determines |
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77 | // which configuration is selected. Up to three chains |
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78 | // are supported. |
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79 | // |
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80 | // The scanout connections from the long and short |
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81 | // chains connect to the following inputs: |
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82 | // |
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83 | // long_chain_so_0, short_chain_so_0 (mandatory) |
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84 | // long_chain_so_1, short_chain_so_1 (optional) |
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85 | // long_chain_so_2, short_chain_so_2 (optional) |
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86 | // |
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87 | // The test stub outputs should connect directly to the |
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88 | // scanout port(s) of the cluster: |
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89 | // |
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90 | // so_0 (mandatory), so_1 (optional), so_2 (optional) |
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91 | // |
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92 | // |
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93 | // Static Output Signals |
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94 | // ===================== |
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95 | // |
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96 | // testmode_l |
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97 | // |
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98 | // Local testmode control for overriding gated |
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99 | // clocks, asynchronous resets, etc. Asserted |
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100 | // for all shift-based test modes. |
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101 | // |
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102 | // mem_bypass |
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103 | // |
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104 | // Memory bypass control for arrays without output |
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105 | // flops. Allows testing of shadow logic. Asserted |
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106 | // for scan test; de-asserted for macrotest. |
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107 | // |
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108 | // |
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109 | // Dynamic Output Signals |
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110 | // ====================== |
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111 | // |
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112 | // sehold |
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113 | // |
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114 | // The sehold signal needs to be set for macrotest |
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115 | // to allow holding flops in the array collars |
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116 | // to retain their shifted data during capture. |
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117 | // Inverted version of scan enable during macrotest. |
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118 | // |
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119 | // mux_drive_disable (for mux/long chain protection) |
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120 | // |
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121 | // Activate one-hot mux protection circuitry during |
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122 | // scan shift and reset. Formerly known as rst_tri_en. |
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123 | // Also used by long chain memories with embedded |
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124 | // control. |
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125 | // |
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126 | // mem_write_disable (for short chain protection) |
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127 | // |
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128 | // Protects contents of short chain memories during |
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129 | // shift and POR. |
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130 | // |
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131 | // se |
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132 | |
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133 | assign mux_drive_disable = ~ctu_tst_pre_grst_l | short_chain_select | se; |
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134 | assign mem_write_disable = ~ctu_tst_pre_grst_l | se; |
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135 | assign sehold = ctu_tst_macrotest & ~se; |
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136 | assign se = global_shift_enable; |
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137 | assign testmode_l = ~ctu_tst_scanmode; |
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138 | assign mem_bypass = ~ctu_tst_macrotest & ~testmode_l; |
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139 | assign pin_based_scan = ctu_tst_scan_disable; |
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140 | assign short_chain_en = ~(pin_based_scan & se); |
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141 | assign short_chain_select = ctu_tst_short_chain & ~testmode_l & short_chain_en; |
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142 | assign so_0 = short_chain_select ? short_chain_so_0 : long_chain_so_0; |
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143 | assign so_1 = short_chain_select ? short_chain_so_1 : long_chain_so_1; |
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144 | assign so_2 = short_chain_select ? short_chain_so_2 : long_chain_so_2; |
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145 | |
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146 | endmodule // test_stub_scan |
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