source:
HDLQ/Library/Inverter.v
@
4
| Revision 4, 144 bytes checked in by HDLQ, 13 years ago (diff) |
|---|
| Line | |
|---|---|
| 1 | module Inverter (in, out, fault); |
| 2 | input in, fault; |
| 3 | output out; |
| 4 | // if fault =1 out is not inverted |
| 5 | assign out = fault ? in : ~in; |
| 6 | endmodule |
Note: See TracBrowser
for help on using the repository browser.
