source:
HDLQ/Library/Inverter.v
@
4
| Revision 4, 144 bytes checked in by HDLQ, 14 years ago (diff) |
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| Rev | Line | |
|---|---|---|
| [1] | 1 | module Inverter (in, out, fault); |
| 2 | input in, fault; | |
| 3 | output out; | |
| 4 | // if fault =1 out is not inverted | |
| 5 | assign out = fault ? in : ~in; | |
| 6 | endmodule |
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