source:
HDLQ/Library/Inverter.v
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1
| Revision 1, 145 bytes checked in by ttvmrc00, 14 years ago (diff) |
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| 1 | module Inverter (in, out, fault); |
| 2 | input in, fault; |
| 3 | output out; |
| 4 | // if fault =1 out is not inverted |
| 5 | assign out = fault ? in : ~in; |
| 6 | endmodule |
| 7 |
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