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1	// ========== Copyright Header Begin ==========================================
2	//
3	// OpenSPARC T1 Processor File: sparc_exu.v
4	// Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
5	// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
6	//
7	// The above named program is free software; you can redistribute it and/or
8	// modify it under the terms of the GNU General Public
9	// License version 2 as published by the Free Software Foundation.
10	//
11	// The above named program is distributed in the hope that it will be
12	// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
13	// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14	// General Public License for more details.
15	//
16	// You should have received a copy of the GNU General Public
17	// License along with this work; if not, write to the Free Software
18	// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
19	//
20	// ========== Copyright Header End ============================================
21	////////////////////////////////////////////////////////////////////////
22	/*
23	// Module Name: sparc_exu
24	// Description: Execution unit containing register file(IRF),
25	// execution control (ECL), ALU, shifting (SHFT).
26	*/
27	module sparc_exu (/AUTOARG/
28	// Outputs
29	exu_tlu_wsr_data_m, exu_tlu_va_oor_m, exu_tlu_va_oor_jl_ret_m,
30	exu_tlu_ue_trap_m, exu_tlu_ttype_vld_m, exu_tlu_ttype_m,
31	exu_tlu_spill_wtype, exu_tlu_spill_tid, exu_tlu_spill_other,
32	exu_tlu_spill, exu_tlu_misalign_addr_jmpl_rtn_m,
33	exu_tlu_cwp_retry, exu_tlu_cwp_cmplt_tid, exu_tlu_cwp_cmplt,
34	exu_tlu_cwp3_w, exu_tlu_cwp2_w, exu_tlu_cwp1_w, exu_tlu_cwp0_w,
35	exu_tlu_ccr3_w, exu_tlu_ccr2_w, exu_tlu_ccr1_w, exu_tlu_ccr0_w,
36	exu_spu_rs3_data_e, exu_mul_rs2_data, exu_mul_rs1_data,
37	exu_mul_input_vld, exu_mmu_early_va_e, exu_lsu_rs3_data_e,
38	exu_lsu_rs2_data_e, exu_lsu_priority_trap_m, exu_lsu_ldst_va_e,
39	exu_lsu_early_va_e, exu_ifu_va_oor_m, exu_ifu_spill_e,
40	exu_ifu_regz_e, exu_ifu_regn_e, exu_ifu_oddwin_s,
41	exu_ifu_longop_done_g, exu_ifu_inj_ack, exu_ifu_err_reg_m,
42	exu_ifu_ecc_ue_m, exu_ifu_ecc_ce_m, exu_ifu_cc_d, exu_ifu_brpc_e,
43	exu_ffu_wsr_inst_e, short_so0, short_so1, so0, exu_ifu_err_synd_m,
44	// Inputs
45	tlu_exu_rsr_data_m, tlu_exu_priv_trap_m, tlu_exu_pic_twobelow_m,
46	tlu_exu_pic_onebelow_m, tlu_exu_cwpccr_update_m,
47	tlu_exu_cwp_retry_m, tlu_exu_cwp_m, tlu_exu_ccr_m,
48	tlu_exu_agp_tid, tlu_exu_agp_swap, tlu_exu_agp, sehold, se, rclk,
49	mul_exu_data_g, mul_exu_ack, lsu_exu_thr_m,
50	lsu_exu_st_dtlb_perr_g, lsu_exu_rd_m, lsu_exu_ldxa_m,
51	lsu_exu_ldxa_data_g, lsu_exu_ldst_miss_g2, lsu_exu_flush_pipe_w,
52	lsu_exu_dfill_vld_g, lsu_exu_dfill_data_g, ifu_tlu_wsr_inst_d,
53	ifu_tlu_sraddr_d, ifu_tlu_flush_m, ifu_exu_wen_d,
54	ifu_exu_useimm_d, ifu_exu_usecin_d, ifu_exu_use_rsr_e_l,
55	ifu_exu_tv_d, ifu_exu_ttype_vld_m, ifu_exu_tid_s2, ifu_exu_tcc_e,
56	ifu_exu_tagop_d, ifu_exu_shiftop_d, ifu_exu_sethi_inst_d,
57	ifu_exu_setcc_d, ifu_exu_saved_e, ifu_exu_save_d,
58	ifu_exu_rs3o_vld_d, ifu_exu_rs3e_vld_d, ifu_exu_rs3_s,
59	ifu_exu_rs2_vld_d, ifu_exu_rs2_s, ifu_exu_rs1_vld_d,
60	ifu_exu_rs1_s, ifu_exu_return_d, ifu_exu_restored_e,
61	ifu_exu_restore_d, ifu_exu_ren3_s, ifu_exu_ren2_s, ifu_exu_ren1_s,
62	ifu_exu_rd_ifusr_e, ifu_exu_rd_ffusr_e, ifu_exu_rd_exusr_e,
63	ifu_exu_rd_d, ifu_exu_range_check_other_d,
64	ifu_exu_range_check_jlret_d, ifu_exu_pcver_e, ifu_exu_pc_d,
65	ifu_exu_nceen_e, ifu_exu_muls_d, ifu_exu_muldivop_d,
66	ifu_exu_kill_e, ifu_exu_invert_d, ifu_exu_inst_vld_w,
67	ifu_exu_inst_vld_e, ifu_exu_inj_irferr, ifu_exu_imm_data_d,
68	ifu_exu_ialign_d, ifu_exu_flushw_e, ifu_exu_enshift_d,
69	ifu_exu_ecc_mask, ifu_exu_dontmv_regz1_e, ifu_exu_dontmv_regz0_e,
70	ifu_exu_disable_ce_e, ifu_exu_dbrinst_d, ifu_exu_casa_d,
71	ifu_exu_aluop_d, ifu_exu_addr_mask_d, grst_l, ffu_exu_rsr_data_m,
72	arst_l, mux_drive_disable, mem_write_disable, short_si0,
73	short_si1, si0
74	) ;
75
76	input mux_drive_disable;
77	input mem_write_disable;
78	input short_si0;
79	input short_si1;
80	input si0;
81	output short_so0;
82	output short_so1;
83	output so0;
84	/AUTOINPUT/
85	// Beginning of automatic inputs (from unused autoinst inputs)
86	input arst_l; // To ecl of sparc_exu_ecl.v, ...
87	input [63:0] ffu_exu_rsr_data_m; // To bypass of sparc_exu_byp.v
88	input grst_l; // To ecl of sparc_exu_ecl.v, ...
89	input ifu_exu_addr_mask_d; // To ecl of sparc_exu_ecl.v
90	input [2:0] ifu_exu_aluop_d; // To ecl of sparc_exu_ecl.v
91	input ifu_exu_casa_d; // To ecl of sparc_exu_ecl.v
92	input ifu_exu_dbrinst_d; // To ecl of sparc_exu_ecl.v
93	input ifu_exu_disable_ce_e; // To ecl of sparc_exu_ecl.v
94	input ifu_exu_dontmv_regz0_e; // To ecl of sparc_exu_ecl.v
95	input ifu_exu_dontmv_regz1_e; // To ecl of sparc_exu_ecl.v
96	input [7:0] ifu_exu_ecc_mask; // To ecl of sparc_exu_ecl.v
97	input ifu_exu_enshift_d; // To ecl of sparc_exu_ecl.v
98	input ifu_exu_flushw_e; // To rml of sparc_exu_rml.v
99	input ifu_exu_ialign_d; // To ecl of sparc_exu_ecl.v
100	input [31:0] ifu_exu_imm_data_d; // To bypass of sparc_exu_byp.v
101	input ifu_exu_inj_irferr; // To ecl of sparc_exu_ecl.v
102	input ifu_exu_inst_vld_e; // To ecl of sparc_exu_ecl.v
103	input ifu_exu_inst_vld_w; // To ecl of sparc_exu_ecl.v
104	input ifu_exu_invert_d; // To ecl of sparc_exu_ecl.v, ...
105	input ifu_exu_kill_e; // To ecl of sparc_exu_ecl.v
106	input [4:0] ifu_exu_muldivop_d; // To ecl of sparc_exu_ecl.v
107	input ifu_exu_muls_d; // To ecl of sparc_exu_ecl.v
108	input ifu_exu_nceen_e; // To ecl of sparc_exu_ecl.v
109	input [47:0] ifu_exu_pc_d; // To bypass of sparc_exu_byp.v
110	input [63:0] ifu_exu_pcver_e; // To bypass of sparc_exu_byp.v
111	input ifu_exu_range_check_jlret_d;// To ecl of sparc_exu_ecl.v
112	input ifu_exu_range_check_other_d;// To ecl of sparc_exu_ecl.v
113	input [4:0] ifu_exu_rd_d; // To ecl of sparc_exu_ecl.v
114	input ifu_exu_rd_exusr_e; // To ecl of sparc_exu_ecl.v
115	input ifu_exu_rd_ffusr_e; // To ecl of sparc_exu_ecl.v
116	input ifu_exu_rd_ifusr_e; // To ecl of sparc_exu_ecl.v
117	input ifu_exu_ren1_s; // To irf of bw_r_irf.v
118	input ifu_exu_ren2_s; // To irf of bw_r_irf.v
119	input ifu_exu_ren3_s; // To irf of bw_r_irf.v
120	input ifu_exu_restore_d; // To ecl of sparc_exu_ecl.v, ...
121	input ifu_exu_restored_e; // To rml of sparc_exu_rml.v
122	input ifu_exu_return_d; // To ecl of sparc_exu_ecl.v
123	input [4:0] ifu_exu_rs1_s; // To irf of bw_r_irf.v, ...
124	input ifu_exu_rs1_vld_d; // To ecl of sparc_exu_ecl.v
125	input [4:0] ifu_exu_rs2_s; // To irf of bw_r_irf.v, ...
126	input ifu_exu_rs2_vld_d; // To ecl of sparc_exu_ecl.v
127	input [4:0] ifu_exu_rs3_s; // To irf of bw_r_irf.v, ...
128	input ifu_exu_rs3e_vld_d; // To ecl of sparc_exu_ecl.v
129	input ifu_exu_rs3o_vld_d; // To ecl of sparc_exu_ecl.v
130	input ifu_exu_save_d; // To ecl of sparc_exu_ecl.v, ...
131	input ifu_exu_saved_e; // To rml of sparc_exu_rml.v
132	input ifu_exu_setcc_d; // To ecl of sparc_exu_ecl.v
133	input ifu_exu_sethi_inst_d; // To ecl of sparc_exu_ecl.v
134	input [2:0] ifu_exu_shiftop_d; // To ecl of sparc_exu_ecl.v
135	input ifu_exu_tagop_d; // To ecl of sparc_exu_ecl.v
136	input ifu_exu_tcc_e; // To ecl of sparc_exu_ecl.v
137	input [1:0] ifu_exu_tid_s2; // To irf of bw_r_irf.v, ...
138	input ifu_exu_ttype_vld_m; // To ecl of sparc_exu_ecl.v
139	input ifu_exu_tv_d; // To ecl of sparc_exu_ecl.v
140	input ifu_exu_use_rsr_e_l; // To ecl of sparc_exu_ecl.v
141	input ifu_exu_usecin_d; // To ecl of sparc_exu_ecl.v
142	input ifu_exu_useimm_d; // To ecl of sparc_exu_ecl.v
143	input ifu_exu_wen_d; // To ecl of sparc_exu_ecl.v
144	input ifu_tlu_flush_m; // To ecl of sparc_exu_ecl.v
145	input [6:0] ifu_tlu_sraddr_d; // To ecl of sparc_exu_ecl.v
146	input ifu_tlu_wsr_inst_d; // To ecl of sparc_exu_ecl.v
147	input [63:0] lsu_exu_dfill_data_g; // To bypass of sparc_exu_byp.v
148	input lsu_exu_dfill_vld_g; // To ecl of sparc_exu_ecl.v
149	input lsu_exu_flush_pipe_w; // To ecl of sparc_exu_ecl.v
150	input lsu_exu_ldst_miss_g2; // To ecl of sparc_exu_ecl.v
151	input [63:0] lsu_exu_ldxa_data_g; // To bypass of sparc_exu_byp.v
152	input lsu_exu_ldxa_m; // To ecl of sparc_exu_ecl.v
153	input [4:0] lsu_exu_rd_m; // To ecl of sparc_exu_ecl.v
154	input lsu_exu_st_dtlb_perr_g; // To ecl of sparc_exu_ecl.v
155	input [1:0] lsu_exu_thr_m; // To ecl of sparc_exu_ecl.v
156	input mul_exu_ack; // To ecl of sparc_exu_ecl.v
157	input [63:0] mul_exu_data_g; // To div of sparc_exu_div.v
158	input rclk; // To irf of bw_r_irf.v, ...
159	input se; // To irf of bw_r_irf.v, ...
160	input sehold; // To irf of bw_r_irf.v, ...
161	input [1:0] tlu_exu_agp; // To rml of sparc_exu_rml.v
162	input tlu_exu_agp_swap; // To rml of sparc_exu_rml.v
163	input [1:0] tlu_exu_agp_tid; // To rml of sparc_exu_rml.v
164	input [7:0] tlu_exu_ccr_m; // To ecl of sparc_exu_ecl.v
165	input [2:0] tlu_exu_cwp_m; // To rml of sparc_exu_rml.v
166	input tlu_exu_cwp_retry_m; // To rml of sparc_exu_rml.v
167	input tlu_exu_cwpccr_update_m;// To ecl of sparc_exu_ecl.v, ...
168	input tlu_exu_pic_onebelow_m; // To ecl of sparc_exu_ecl.v
169	input tlu_exu_pic_twobelow_m; // To ecl of sparc_exu_ecl.v
170	input tlu_exu_priv_trap_m; // To ecl of sparc_exu_ecl.v
171	input [63:0] tlu_exu_rsr_data_m; // To bypass of sparc_exu_byp.v
172	// End of automatics
173	/AUTOOUTPUT/
174	// Beginning of automatic outputs (from unused autoinst outputs)
175	output exu_ffu_wsr_inst_e; // From ecl of sparc_exu_ecl.v
176	output [47:0] exu_ifu_brpc_e; // From alu of sparc_exu_alu.v
177	output [7:0] exu_ifu_cc_d; // From ecl of sparc_exu_ecl.v
178	output exu_ifu_ecc_ce_m; // From ecl of sparc_exu_ecl.v
179	output exu_ifu_ecc_ue_m; // From ecl of sparc_exu_ecl.v
180	output [7:0] exu_ifu_err_reg_m; // From ecl of sparc_exu_ecl.v
181	output exu_ifu_inj_ack; // From ecl of sparc_exu_ecl.v
182	output [3:0] exu_ifu_longop_done_g; // From ecl of sparc_exu_ecl.v
183	output [3:0] exu_ifu_oddwin_s; // From rml of sparc_exu_rml.v
184	output exu_ifu_regn_e; // From alu of sparc_exu_alu.v
185	output exu_ifu_regz_e; // From alu of sparc_exu_alu.v
186	output exu_ifu_spill_e; // From rml of sparc_exu_rml.v
187	output exu_ifu_va_oor_m; // From ecl of sparc_exu_ecl.v
188	output [10:3] exu_lsu_early_va_e; // From alu of sparc_exu_alu.v
189	output [47:0] exu_lsu_ldst_va_e; // From alu of sparc_exu_alu.v
190	output exu_lsu_priority_trap_m;// From ecl of sparc_exu_ecl.v
191	output [63:0] exu_lsu_rs2_data_e; // From bypass of sparc_exu_byp.v
192	output [63:0] exu_lsu_rs3_data_e; // From bypass of sparc_exu_byp.v
193	output [7:0] exu_mmu_early_va_e; // From alu of sparc_exu_alu.v
194	output exu_mul_input_vld; // From ecl of sparc_exu_ecl.v
195	output [63:0] exu_mul_rs1_data; // From div of sparc_exu_div.v
196	output [63:0] exu_mul_rs2_data; // From div of sparc_exu_div.v
197	output [63:0] exu_spu_rs3_data_e; // From bypass of sparc_exu_byp.v
198	output [7:0] exu_tlu_ccr0_w; // From ecl of sparc_exu_ecl.v
199	output [7:0] exu_tlu_ccr1_w; // From ecl of sparc_exu_ecl.v
200	output [7:0] exu_tlu_ccr2_w; // From ecl of sparc_exu_ecl.v
201	output [7:0] exu_tlu_ccr3_w; // From ecl of sparc_exu_ecl.v
202	output [2:0] exu_tlu_cwp0_w; // From rml of sparc_exu_rml.v
203	output [2:0] exu_tlu_cwp1_w; // From rml of sparc_exu_rml.v
204	output [2:0] exu_tlu_cwp2_w; // From rml of sparc_exu_rml.v
205	output [2:0] exu_tlu_cwp3_w; // From rml of sparc_exu_rml.v
206	output exu_tlu_cwp_cmplt; // From rml of sparc_exu_rml.v
207	output [1:0] exu_tlu_cwp_cmplt_tid; // From rml of sparc_exu_rml.v
208	output exu_tlu_cwp_retry; // From rml of sparc_exu_rml.v
209	output exu_tlu_misalign_addr_jmpl_rtn_m;// From ecl of sparc_exu_ecl.v
210	output exu_tlu_spill; // From rml of sparc_exu_rml.v
211	output exu_tlu_spill_other; // From rml of sparc_exu_rml.v
212	output [1:0] exu_tlu_spill_tid; // From rml of sparc_exu_rml.v
213	output [2:0] exu_tlu_spill_wtype; // From rml of sparc_exu_rml.v
214	output [8:0] exu_tlu_ttype_m; // From ecl of sparc_exu_ecl.v
215	output exu_tlu_ttype_vld_m; // From ecl of sparc_exu_ecl.v
216	output exu_tlu_ue_trap_m; // From ecl of sparc_exu_ecl.v
217	output exu_tlu_va_oor_jl_ret_m;// From ecl of sparc_exu_ecl.v
218	output exu_tlu_va_oor_m; // From ecl of sparc_exu_ecl.v
219	output [63:0] exu_tlu_wsr_data_m; // From bypass of sparc_exu_byp.v
220	// End of automatics
221	/AUTOWIRE/
222	// Beginning of automatic wires (for undeclared instantiated-module outputs)
223	wire [63:0] alu_byp_rd_data_e; // From alu of sparc_exu_alu.v
224	wire alu_ecl_add_n32_e; // From alu of sparc_exu_alu.v
225	wire alu_ecl_add_n64_e; // From alu of sparc_exu_alu.v
226	wire alu_ecl_adder_out_63_e; // From alu of sparc_exu_alu.v
227	wire alu_ecl_adderin2_31_e; // From alu of sparc_exu_alu.v
228	wire alu_ecl_adderin2_63_e; // From alu of sparc_exu_alu.v
229	wire alu_ecl_cout32_e; // From alu of sparc_exu_alu.v
230	wire alu_ecl_cout64_e_l; // From alu of sparc_exu_alu.v
231	wire alu_ecl_log_n32_e; // From alu of sparc_exu_alu.v
232	wire alu_ecl_log_n64_e; // From alu of sparc_exu_alu.v
233	wire alu_ecl_mem_addr_invalid_e_l;// From alu of sparc_exu_alu.v
234	wire alu_ecl_zhigh_e; // From alu of sparc_exu_alu.v
235	wire alu_ecl_zlow_e; // From alu of sparc_exu_alu.v
236	wire [63:0] byp_alu_rcc_data_e; // From bypass of sparc_exu_byp.v
237	wire [63:0] byp_alu_rs1_data_e; // From bypass of sparc_exu_byp.v
238	wire [63:0] byp_alu_rs2_data_e_l; // From bypass of sparc_exu_byp.v
239	wire [63:0] byp_ecc_rcc_data_e; // From bypass of sparc_exu_byp.v
240	wire [7:0] byp_ecc_rs1_synd_d; // From bypass of sparc_exu_byp.v
241	wire [7:0] byp_ecc_rs2_synd_d; // From bypass of sparc_exu_byp.v
242	wire [63:0] byp_ecc_rs3_data_e; // From bypass of sparc_exu_byp.v
243	wire [7:0] byp_ecc_rs3_synd_d; // From bypass of sparc_exu_byp.v
244	wire [2:0] byp_ecl_rs1_2_0_e; // From bypass of sparc_exu_byp.v
245	wire byp_ecl_rs1_31_e; // From bypass of sparc_exu_byp.v
246	wire byp_ecl_rs1_63_e; // From bypass of sparc_exu_byp.v
247	wire byp_ecl_rs2_31_e; // From bypass of sparc_exu_byp.v
248	wire [3:0] byp_ecl_rs2_3_0_e; // From bypass of sparc_exu_byp.v
249	wire [71:0] byp_irf_rd_data_w; // From bypass of sparc_exu_byp.v
250	wire [71:0] byp_irf_rd_data_w2; // From bypass of sparc_exu_byp.v
251	wire [63:0] div_byp_muldivout_g; // From div of sparc_exu_div.v
252	wire [31:0] div_byp_yreg_e; // From div of sparc_exu_div.v
253	wire div_ecl_adder_out_31; // From div of sparc_exu_div.v
254	wire div_ecl_cout32; // From div of sparc_exu_div.v
255	wire div_ecl_cout64; // From div of sparc_exu_div.v
256	wire div_ecl_d_62; // From div of sparc_exu_div.v
257	wire div_ecl_d_msb; // From div of sparc_exu_div.v
258	wire div_ecl_detect_zero_high;// From div of sparc_exu_div.v
259	wire div_ecl_detect_zero_low;// From div of sparc_exu_div.v
260	wire div_ecl_dividend_msb; // From div of sparc_exu_div.v
261	wire div_ecl_gencc_in_31; // From div of sparc_exu_div.v
262	wire div_ecl_gencc_in_msb_l; // From div of sparc_exu_div.v
263	wire div_ecl_low32_nonzero; // From div of sparc_exu_div.v
264	wire div_ecl_upper32_equal; // From div of sparc_exu_div.v
265	wire div_ecl_x_msb; // From div of sparc_exu_div.v
266	wire div_ecl_xin_msb_l; // From div of sparc_exu_div.v
267	wire [3:0] div_ecl_yreg_0_l; // From div of sparc_exu_div.v
268	wire [63:0] ecc_byp_ecc_result_m; // From ecc of sparc_exu_ecc.v
269	wire ecc_ecl_rs1_ce; // From ecc of sparc_exu_ecc.v
270	wire ecc_ecl_rs1_ue; // From ecc of sparc_exu_ecc.v
271	wire ecc_ecl_rs2_ce; // From ecc of sparc_exu_ecc.v
272	wire ecc_ecl_rs2_ue; // From ecc of sparc_exu_ecc.v
273	wire ecc_ecl_rs3_ce; // From ecc of sparc_exu_ecc.v
274	wire ecc_ecl_rs3_ue; // From ecc of sparc_exu_ecc.v
275	wire ecl_alu_cin_e; // From ecl of sparc_exu_ecl.v
276	wire ecl_alu_log_sel_and_e; // From ecl of sparc_exu_ecl.v
277	wire ecl_alu_log_sel_move_e; // From ecl of sparc_exu_ecl.v
278	wire ecl_alu_log_sel_or_e; // From ecl of sparc_exu_ecl.v
279	wire ecl_alu_log_sel_xor_e; // From ecl of sparc_exu_ecl.v
280	wire ecl_alu_out_sel_logic_e_l;// From ecl of sparc_exu_ecl.v
281	wire ecl_alu_out_sel_rs3_e_l;// From ecl of sparc_exu_ecl.v
282	wire ecl_alu_out_sel_shift_e_l;// From ecl of sparc_exu_ecl.v
283	wire ecl_alu_out_sel_sum_e_l;// From ecl of sparc_exu_ecl.v
284	wire ecl_alu_sethi_inst_e; // From ecl of sparc_exu_ecl.v
285	wire [2:0] ecl_byp_3lsb_m; // From ecl of sparc_exu_ecl.v
286	wire [7:0] ecl_byp_ecc_mask_m_l; // From ecl of sparc_exu_ecl.v
287	wire [7:0] ecl_byp_eclpr_e; // From ecl of sparc_exu_ecl.v
288	wire ecl_byp_ldxa_g; // From ecl of sparc_exu_ecl.v
289	wire ecl_byp_rcc_mux1_sel_m; // From ecl of sparc_exu_ecl.v
290	wire ecl_byp_rcc_mux1_sel_other;// From ecl of sparc_exu_ecl.v
291	wire ecl_byp_rcc_mux1_sel_w; // From ecl of sparc_exu_ecl.v
292	wire ecl_byp_rcc_mux1_sel_w2;// From ecl of sparc_exu_ecl.v
293	wire ecl_byp_rcc_mux2_sel_e; // From ecl of sparc_exu_ecl.v
294	wire ecl_byp_rcc_mux2_sel_ld;// From ecl of sparc_exu_ecl.v
295	wire ecl_byp_rcc_mux2_sel_rf;// From ecl of sparc_exu_ecl.v
296	wire ecl_byp_rcc_mux2_sel_usemux1;// From ecl of sparc_exu_ecl.v
297	wire ecl_byp_restore_m; // From ecl of sparc_exu_ecl.v
298	wire ecl_byp_rs1_longmux_sel_g2;// From ecl of sparc_exu_ecl.v
299	wire ecl_byp_rs1_longmux_sel_ldxa;// From ecl of sparc_exu_ecl.v
300	wire ecl_byp_rs1_longmux_sel_w2;// From ecl of sparc_exu_ecl.v
301	wire ecl_byp_rs1_mux1_sel_m; // From ecl of sparc_exu_ecl.v
302	wire ecl_byp_rs1_mux1_sel_other;// From ecl of sparc_exu_ecl.v
303	wire ecl_byp_rs1_mux1_sel_w; // From ecl of sparc_exu_ecl.v
304	wire ecl_byp_rs1_mux1_sel_w2;// From ecl of sparc_exu_ecl.v
305	wire ecl_byp_rs1_mux2_sel_e; // From ecl of sparc_exu_ecl.v
306	wire ecl_byp_rs1_mux2_sel_ld;// From ecl of sparc_exu_ecl.v
307	wire ecl_byp_rs1_mux2_sel_rf;// From ecl of sparc_exu_ecl.v
308	wire ecl_byp_rs1_mux2_sel_usemux1;// From ecl of sparc_exu_ecl.v
309	wire ecl_byp_rs2_longmux_sel_g2;// From ecl of sparc_exu_ecl.v
310	wire ecl_byp_rs2_longmux_sel_ldxa;// From ecl of sparc_exu_ecl.v
311	wire ecl_byp_rs2_longmux_sel_w2;// From ecl of sparc_exu_ecl.v
312	wire ecl_byp_rs2_mux1_sel_m; // From ecl of sparc_exu_ecl.v
313	wire ecl_byp_rs2_mux1_sel_other;// From ecl of sparc_exu_ecl.v
314	wire ecl_byp_rs2_mux1_sel_w; // From ecl of sparc_exu_ecl.v
315	wire ecl_byp_rs2_mux1_sel_w2;// From ecl of sparc_exu_ecl.v
316	wire ecl_byp_rs2_mux2_sel_e; // From ecl of sparc_exu_ecl.v
317	wire ecl_byp_rs2_mux2_sel_ld;// From ecl of sparc_exu_ecl.v
318	wire ecl_byp_rs2_mux2_sel_rf;// From ecl of sparc_exu_ecl.v
319	wire ecl_byp_rs2_mux2_sel_usemux1;// From ecl of sparc_exu_ecl.v
320	wire ecl_byp_rs3_longmux_sel_g2;// From ecl of sparc_exu_ecl.v
321	wire ecl_byp_rs3_longmux_sel_ldxa;// From ecl of sparc_exu_ecl.v
322	wire ecl_byp_rs3_longmux_sel_w2;// From ecl of sparc_exu_ecl.v
323	wire ecl_byp_rs3_mux1_sel_m; // From ecl of sparc_exu_ecl.v
324	wire ecl_byp_rs3_mux1_sel_other;// From ecl of sparc_exu_ecl.v
325	wire ecl_byp_rs3_mux1_sel_w; // From ecl of sparc_exu_ecl.v
326	wire ecl_byp_rs3_mux1_sel_w2;// From ecl of sparc_exu_ecl.v
327	wire ecl_byp_rs3_mux2_sel_e; // From ecl of sparc_exu_ecl.v
328	wire ecl_byp_rs3_mux2_sel_ld;// From ecl of sparc_exu_ecl.v
329	wire ecl_byp_rs3_mux2_sel_rf;// From ecl of sparc_exu_ecl.v
330	wire ecl_byp_rs3_mux2_sel_usemux1;// From ecl of sparc_exu_ecl.v
331	wire ecl_byp_rs3h_longmux_sel_g2;// From ecl of sparc_exu_ecl.v
332	wire ecl_byp_rs3h_longmux_sel_ldxa;// From ecl of sparc_exu_ecl.v
333	wire ecl_byp_rs3h_longmux_sel_w2;// From ecl of sparc_exu_ecl.v
334	wire ecl_byp_rs3h_mux1_sel_m;// From ecl of sparc_exu_ecl.v
335	wire ecl_byp_rs3h_mux1_sel_other;// From ecl of sparc_exu_ecl.v
336	wire ecl_byp_rs3h_mux1_sel_w;// From ecl of sparc_exu_ecl.v
337	wire ecl_byp_rs3h_mux1_sel_w2;// From ecl of sparc_exu_ecl.v
338	wire ecl_byp_rs3h_mux2_sel_e;// From ecl of sparc_exu_ecl.v
339	wire ecl_byp_rs3h_mux2_sel_ld;// From ecl of sparc_exu_ecl.v
340	wire ecl_byp_rs3h_mux2_sel_rf;// From ecl of sparc_exu_ecl.v
341	wire ecl_byp_rs3h_mux2_sel_usemux1;// From ecl of sparc_exu_ecl.v
342	wire ecl_byp_sel_alu_e; // From ecl of sparc_exu_ecl.v
343	wire ecl_byp_sel_ecc_m; // From ecl of sparc_exu_ecl.v
344	wire ecl_byp_sel_eclpr_e; // From ecl of sparc_exu_ecl.v
345	wire ecl_byp_sel_ffusr_m; // From ecl of sparc_exu_ecl.v
346	wire ecl_byp_sel_ifex_m; // From ecl of sparc_exu_ecl.v
347	wire ecl_byp_sel_ifusr_e; // From ecl of sparc_exu_ecl.v
348	wire ecl_byp_sel_load_g; // From ecl of sparc_exu_ecl.v
349	wire ecl_byp_sel_load_m; // From ecl of sparc_exu_ecl.v
350	wire ecl_byp_sel_muldiv_g; // From ecl of sparc_exu_ecl.v
351	wire ecl_byp_sel_pipe_m; // From ecl of sparc_exu_ecl.v
352	wire ecl_byp_sel_restore_g; // From ecl of sparc_exu_ecl.v
353	wire ecl_byp_sel_restore_m; // From ecl of sparc_exu_ecl.v
354	wire ecl_byp_sel_tlusr_m; // From ecl of sparc_exu_ecl.v
355	wire ecl_byp_sel_yreg_e; // From ecl of sparc_exu_ecl.v
356	wire ecl_byp_std_e_l; // From ecl of sparc_exu_ecl.v
357	wire ecl_div_almostlast_cycle;// From ecl of sparc_exu_ecl.v
358	wire ecl_div_cin; // From ecl of sparc_exu_ecl.v
359	wire ecl_div_div64; // From ecl of sparc_exu_ecl.v
360	wire ecl_div_dividend_sign; // From ecl of sparc_exu_ecl.v
361	wire ecl_div_keep_d; // From ecl of sparc_exu_ecl.v
362	wire ecl_div_keepx; // From ecl of sparc_exu_ecl.v
363	wire ecl_div_last_cycle; // From ecl of sparc_exu_ecl.v
364	wire ecl_div_ld_inputs; // From ecl of sparc_exu_ecl.v
365	wire ecl_div_mul_get_32bit_data;// From ecl of sparc_exu_ecl.v
366	wire ecl_div_mul_get_new_data;// From ecl of sparc_exu_ecl.v
367	wire ecl_div_mul_keep_data; // From ecl of sparc_exu_ecl.v
368	wire ecl_div_mul_sext_rs1_e; // From ecl of sparc_exu_ecl.v
369	wire ecl_div_mul_sext_rs2_e; // From ecl of sparc_exu_ecl.v
370	wire ecl_div_mul_wen; // From ecl of sparc_exu_ecl.v
371	wire ecl_div_muls; // From ecl of sparc_exu_ecl.v
372	wire ecl_div_muls_rs1_31_e_l;// From ecl of sparc_exu_ecl.v
373	wire ecl_div_newq; // From ecl of sparc_exu_ecl.v
374	wire ecl_div_sel_64b; // From ecl of sparc_exu_ecl.v
375	wire ecl_div_sel_adder; // From ecl of sparc_exu_ecl.v
376	wire ecl_div_sel_div; // From ecl of sparc_exu_ecl.v
377	wire ecl_div_sel_neg32; // From ecl of sparc_exu_ecl.v
378	wire ecl_div_sel_pos32; // From ecl of sparc_exu_ecl.v
379	wire ecl_div_sel_u32; // From ecl of sparc_exu_ecl.v
380	wire ecl_div_subtract_l; // From ecl of sparc_exu_ecl.v
381	wire [3:0] ecl_div_thr_e; // From ecl of sparc_exu_ecl.v
382	wire ecl_div_upper32_zero; // From ecl of sparc_exu_ecl.v
383	wire ecl_div_upper33_one; // From ecl of sparc_exu_ecl.v
384	wire ecl_div_upper33_zero; // From ecl of sparc_exu_ecl.v
385	wire ecl_div_xinmask; // From ecl of sparc_exu_ecl.v
386	wire ecl_div_yreg_data_31_g; // From ecl of sparc_exu_ecl.v
387	wire [3:0] ecl_div_yreg_shift_g; // From ecl of sparc_exu_ecl.v
388	wire [3:0] ecl_div_yreg_wen_g; // From ecl of sparc_exu_ecl.v
389	wire [3:0] ecl_div_yreg_wen_l; // From ecl of sparc_exu_ecl.v
390	wire [3:0] ecl_div_yreg_wen_w; // From ecl of sparc_exu_ecl.v
391	wire ecl_div_zero_rs2_e; // From ecl of sparc_exu_ecl.v
392	wire ecl_ecc_log_rs1_m; // From ecl of sparc_exu_ecl.v
393	wire ecl_ecc_log_rs2_m; // From ecl of sparc_exu_ecl.v
394	wire ecl_ecc_log_rs3_m; // From ecl of sparc_exu_ecl.v
395	wire ecl_ecc_rs1_use_rf_e; // From ecl of sparc_exu_ecl.v
396	wire ecl_ecc_rs2_use_rf_e; // From ecl of sparc_exu_ecl.v
397	wire ecl_ecc_rs3_use_rf_e; // From ecl of sparc_exu_ecl.v
398	wire ecl_ecc_sel_rs1_m_l; // From ecl of sparc_exu_ecl.v
399	wire ecl_ecc_sel_rs2_m_l; // From ecl of sparc_exu_ecl.v
400	wire ecl_ecc_sel_rs3_m_l; // From ecl of sparc_exu_ecl.v
401	wire [4:0] ecl_irf_rd_g; // From ecl of sparc_exu_ecl.v
402	wire [4:0] ecl_irf_rd_m; // From ecl of sparc_exu_ecl.v
403	wire [1:0] ecl_irf_tid_g; // From ecl of sparc_exu_ecl.v
404	wire [1:0] ecl_irf_tid_m; // From ecl of sparc_exu_ecl.v
405	wire ecl_irf_wen_w; // From ecl of sparc_exu_ecl.v
406	wire ecl_irf_wen_w2; // From ecl of sparc_exu_ecl.v
407	wire ecl_rml_canrestore_wen_w;// From ecl of sparc_exu_ecl.v
408	wire ecl_rml_cansave_wen_w; // From ecl of sparc_exu_ecl.v
409	wire ecl_rml_cleanwin_wen_w; // From ecl of sparc_exu_ecl.v
410	wire ecl_rml_cwp_wen_e; // From ecl of sparc_exu_ecl.v
411	wire ecl_rml_early_flush_w; // From ecl of sparc_exu_ecl.v
412	wire ecl_rml_inst_vld_w; // From ecl of sparc_exu_ecl.v
413	wire ecl_rml_kill_e; // From ecl of sparc_exu_ecl.v
414	wire ecl_rml_kill_w; // From ecl of sparc_exu_ecl.v
415	wire ecl_rml_otherwin_wen_w; // From ecl of sparc_exu_ecl.v
416	wire [3:0] ecl_rml_thr_m; // From ecl of sparc_exu_ecl.v
417	wire [3:0] ecl_rml_thr_w; // From ecl of sparc_exu_ecl.v
418	wire ecl_rml_wstate_wen_w; // From ecl of sparc_exu_ecl.v
419	wire [2:0] ecl_rml_xor_data_e; // From ecl of sparc_exu_ecl.v
420	wire ecl_shft_enshift_e_l; // From ecl of sparc_exu_ecl.v
421	wire ecl_shft_extend32bit_e_l;// From ecl of sparc_exu_ecl.v
422	wire ecl_shft_extendbit_e; // From ecl of sparc_exu_ecl.v
423	wire ecl_shft_lshift_e_l; // From ecl of sparc_exu_ecl.v
424	wire ecl_shft_op32_e; // From ecl of sparc_exu_ecl.v
425	wire [3:0] ecl_shft_shift1_e; // From ecl of sparc_exu_ecl.v
426	wire [3:0] ecl_shft_shift4_e; // From ecl of sparc_exu_ecl.v
427	wire [71:0] irf_byp_rs1_data_d_l; // From irf of bw_r_irf.v
428	wire [71:0] irf_byp_rs2_data_d_l; // From irf of bw_r_irf.v
429	wire [71:0] irf_byp_rs3_data_d_l; // From irf of bw_r_irf.v
430	wire [31:0] irf_byp_rs3h_data_d_l; // From irf of bw_r_irf.v
431	wire [2:0] rml_ecl_canrestore_d; // From rml of sparc_exu_rml.v
432	wire [2:0] rml_ecl_cansave_d; // From rml of sparc_exu_rml.v
433	wire rml_ecl_clean_window_e; // From rml of sparc_exu_rml.v
434	wire [2:0] rml_ecl_cleanwin_d; // From rml of sparc_exu_rml.v
435	wire [2:0] rml_ecl_cwp_d; // From rml of sparc_exu_rml.v
436	wire rml_ecl_fill_e; // From rml of sparc_exu_rml.v
437	wire [1:0] rml_ecl_gl_e; // From rml of sparc_exu_rml.v
438	wire rml_ecl_kill_m; // From rml of sparc_exu_rml.v
439	wire rml_ecl_other_e; // From rml of sparc_exu_rml.v
440	wire [2:0] rml_ecl_otherwin_d; // From rml of sparc_exu_rml.v
441	wire rml_ecl_rmlop_done_e; // From rml of sparc_exu_rml.v
442	wire [3:0] rml_ecl_swap_done; // From rml of sparc_exu_rml.v
443	wire [5:0] rml_ecl_wstate_d; // From rml of sparc_exu_rml.v
444	wire [2:0] rml_ecl_wtype_e; // From rml of sparc_exu_rml.v
445	wire [1:0] rml_irf_cwpswap_tid_e; // From rml of sparc_exu_rml.v
446	wire [1:0] rml_irf_global_tid; // From rml of sparc_exu_rml.v
447	wire rml_irf_kill_restore_w; // From rml of sparc_exu_rml.v
448	wire [1:0] rml_irf_new_agp; // From rml of sparc_exu_rml.v
449	wire [2:0] rml_irf_new_lo_cwp_e; // From rml of sparc_exu_rml.v
450	wire [1:0] rml_irf_old_agp; // From rml of sparc_exu_rml.v
451	wire [2:0] rml_irf_old_lo_cwp_e; // From rml of sparc_exu_rml.v
452	wire rml_irf_swap_even_e; // From rml of sparc_exu_rml.v
453	wire rml_irf_swap_global; // From rml of sparc_exu_rml.v
454	wire rml_irf_swap_local_e; // From rml of sparc_exu_rml.v
455	wire rml_irf_swap_odd_e; // From rml of sparc_exu_rml.v
456	wire [63:0] shft_alu_shift_out_e; // From shft of sparc_exu_shft.v
457	// End of automatics
458	wire short_scan0_1;
459	wire scan0_1,scan0_2,scan0_3;
460
461	wire ecl_alu_casa_e;
462	wire [63:0] byp_alu_rs2_data_e;
463	output [7:0] exu_ifu_err_synd_m;
464	wire [1:0] rml_irf_old_e_cwp_e;
465	wire [1:0] rml_irf_new_e_cwp_e;
466	`ifdef FPGA_NEW_IRF
467
468	wire [ 71:0]irf_byp_rs1_data_d_l_fpga;
469	wire [ 71:0]irf_byp_rs2_data_d_l_fpga;
470	wire [ 71:0]irf_byp_rs3_data_d_l_fpga;
471	wire [ 31:0]irf_byp_rs3h_data_d_l_fpga;
472
473	/*clkdbl clkdbl_inst(
474	.inclk0(rclk),
475	.c0(rclk2x)
476	);
477
478	wire [738:0] ILA_DATA;
479	wire [ 71:0]irf_byp_rs1_data_d_l_ref;
480	wire [ 71:0]irf_byp_rs2_data_d_l_ref;
481	wire [ 71:0]irf_byp_rs3_data_d_l_ref;
482	wire [ 31:0]irf_byp_rs3h_data_d_l_ref;
483
484	ST1 ila(
485	.acq_clk(rclk),
486	.acq_data_in(ILA_DATA),
487	.acq_trigger_in(ILA_DATA)
488	);
489
490	wire [35:0] ref_cnt;
491	wire [ 3:0] allow;
492	reg [35:0] cnt;
493	reg [15:0] err_cnt;
494
495	VIO1 vio(
496	.probe(cnt>refcnt),
497	.source({allow,ref_cnt})
498	);
499
500	reg ifu_exu_ren1_s_d;
501	reg ifu_exu_ren2_s_d;
502	reg ifu_exu_ren3_s_d;
503	reg [71:0] irf_byp_rs1_data_d_l_fpga_d;
504	reg [71:0] irf_byp_rs2_data_d_l_fpga_d;
505	reg [71:0] irf_byp_rs3_data_d_l_fpga_d;
506	reg [31:0] irf_byp_rs3h_data_d_l_fpga_d;
507	reg [71:0] irf_byp_rs1_data_d_l_d;
508	reg [71:0] irf_byp_rs2_data_d_l_d;
509	reg [71:0] irf_byp_rs3_data_d_l_d;
510	reg [31:0] irf_byp_rs3h_data_d_l_d;
511	reg [31:0] written;
512	reg swap_d;
513	reg swap_d1;
514	reg [ 4:0] ecl_irf_rd_m_d;
515	reg [ 4:0] ecl_irf_rd_g_d;
516	reg [ 2:0] current_window;
517	reg [ 2:0] new_lo_cwp_d;
518	reg [ 4:0] ifu_exu_rs1_s_d;
519	reg [ 4:0] ifu_exu_rs2_s_d;
520	reg [ 4:0] ifu_exu_rs3_s_d;
521
522	wire [4:0] wraddr0=current_window[0] && ecl_irf_rd_m_d[3] ? {~ecl_irf_rd_m_d[4],ecl_irf_rd_m_d[3:0]}:ecl_irf_rd_m_d;
523	wire [4:0] wraddr1=current_window[0] && ecl_irf_rd_g_d[3] ? {~ecl_irf_rd_g_d[4],ecl_irf_rd_g_d[3:0]}:ecl_irf_rd_g_d;
524	wire [4:0] rdaddr0=current_window[0] && ifu_exu_rs1_s_d[3] ? {~ifu_exu_rs1_s_d[4],ifu_exu_rs1_s_d[3:0]}:ifu_exu_rs1_s_d;
525	wire [4:0] rdaddr1=current_window[0] && ifu_exu_rs2_s_d[3] ? {~ifu_exu_rs2_s_d[4],ifu_exu_rs2_s_d[3:0]}:ifu_exu_rs2_s_d;
526	wire [4:0] rdaddr2=current_window[0] && ifu_exu_rs3_s_d[3] ? {~ifu_exu_rs3_s_d[4],ifu_exu_rs3_s_d[3:0]}:ifu_exu_rs3_s_d;
527
528	wire [3:0] syndrome;
529
530	always @(posedge rclk or negedge arst_l)
531	if(~arst_l)
532	begin
533	written<=0;
534	current_window<=0;
535	swap_d<=0;
536	swap_d1<=0;
537	err_cnt<=0;
538	end
539	else
540	begin
541	if(rml_irf_swap_local_e && (current_window!=rml_irf_old_lo_cwp_e))
542	cnt<=36'b0;
543	else
544	cnt<=cnt+1;
545	if(err_cnt==16'h0360)
546	err_cnt<=16'b0;
547	else
548	if(rml_irf_swap_local_e && (current_window!=rml_irf_old_lo_cwp_e))
549	err_cnt<=err_cnt+1;
550	ifu_exu_ren1_s_d<=ifu_exu_ren1_s;
551	ifu_exu_ren2_s_d<=ifu_exu_ren2_s;
552	ifu_exu_ren3_s_d<=ifu_exu_ren3_s;
553	irf_byp_rs1_data_d_l_fpga_d<=irf_byp_rs1_data_d_l_fpga;
554	irf_byp_rs2_data_d_l_fpga_d<=irf_byp_rs2_data_d_l_fpga;
555	irf_byp_rs3_data_d_l_fpga_d<=irf_byp_rs3_data_d_l_fpga;
556	irf_byp_rs3h_data_d_l_fpga_d<=irf_byp_rs3h_data_d_l_fpga;
557	irf_byp_rs1_data_d_l_d<=irf_byp_rs1_data_d_l;
558	irf_byp_rs2_data_d_l_d<=irf_byp_rs2_data_d_l;
559	irf_byp_rs3_data_d_l_d<=irf_byp_rs3_data_d_l;
560	irf_byp_rs3h_data_d_l_d<=irf_byp_rs3h_data_d_l;
561	swap_d<=rml_irf_swap_local_e;
562	swap_d1<=swap_d;
563	ecl_irf_rd_m_d<=ecl_irf_rd_m;
564	ecl_irf_rd_g_d<=ecl_irf_rd_g;
565	new_lo_cwp_d<=rml_irf_new_lo_cwp_e;
566	ifu_exu_rs1_s_d<=ifu_exu_rs1_s;
567	ifu_exu_rs2_s_d<=ifu_exu_rs2_s;
568	ifu_exu_rs3_s_d<=ifu_exu_rs3_s;
569	if(swap_d)
570	current_window<=new_lo_cwp_d;
571	if(swap_d1)
572	if(rml_irf_kill_restore_w) // SAVE
573	written<=(ecl_irf_wen_w<<wraddr0) \| (ecl_irf_wen_w2<<wraddr1);
574	else // restore
575	written<=32'hFFFFFFFF;
576	else
577	begin
578	if(ecl_irf_wen_w)
579	written[wraddr0]<=1;
580	if(ecl_irf_wen_w2)
581	written[wraddr1]<=1;
582	end
583	end
584
585	wire read_lo0=(rdaddr0>5'd7) && (rdaddr0<5'd24);
586	wire read_lo1=(rdaddr1>5'd7) && (rdaddr1<5'd24);
587	wire read_lo2=(rdaddr2>5'd7) && (rdaddr2<5'd24);
588	wire read_known0=(!read_lo0) \|\| written[rdaddr0];
589	wire read_known1=(!read_lo1) \|\| written[rdaddr1];
590	wire read_known2=(!read_lo2) \|\| written[rdaddr2];
591
592	assign syndrome[0]=ifu_exu_ren1_s_d && (irf_byp_rs1_data_d_l_ref!=irf_byp_rs1_data_d_l_fpga);
593	assign syndrome[1]=ifu_exu_ren2_s_d && (irf_byp_rs2_data_d_l_ref!=irf_byp_rs2_data_d_l_fpga);
594	assign syndrome[2]=ifu_exu_ren3_s_d && (irf_byp_rs3_data_d_l_ref!=irf_byp_rs3_data_d_l_fpga);
595	assign syndrome[3]=ifu_exu_ren3_s_d && (irf_byp_rs3h_data_d_l_ref!=irf_byp_rs3h_data_d_l_fpga);
596
597	//assign ILA_DATA[1:0]=ifu_exu_tid_s2;
598	//assign ILA_DATA[6:2]=ifu_exu_rs1_s;
599	//assign ILA_DATA[11:7]=ifu_exu_rs2_s;
600	//assign ILA_DATA[16:12]=ifu_exu_rs3_s;
601	//assign ILA_DATA[17]=ifu_exu_ren1_s;
602	//assign ILA_DATA[18]=ifu_exu_ren2_s;
603	//assign ILA_DATA[19]=ifu_exu_ren3_s;
604	//assign ILA_DATA[20]=ecl_irf_wen_w;
605	//assign ILA_DATA[21]=ecl_irf_wen_w2;
606	//assign ILA_DATA[26:22]=ecl_irf_rd_m_d;
607	//assign ILA_DATA[31:27]=ecl_irf_rd_g_d;
608	//assign ILA_DATA[103:32]=byp_irf_rd_data_w;
609	//assign ILA_DATA[175:104]=byp_irf_rd_data_w2;
610	//assign ILA_DATA[177:176]=ecl_irf_tid_m;
611	//assign ILA_DATA[179:178]=ecl_irf_tid_g;
612	//assign ILA_DATA[182:180]=rml_irf_old_lo_cwp_e;
613	//assign ILA_DATA[185:183]=rml_irf_new_lo_cwp_e;
614	//assign ILA_DATA[187:186]=rml_irf_old_e_cwp_e;
615	//assign ILA_DATA[189:188]=rml_irf_new_e_cwp_e;
616	//assign ILA_DATA[190]=rml_irf_swap_even_e;
617	//assign ILA_DATA[191]=rml_irf_swap_odd_e;
618	//assign ILA_DATA[192]=rml_irf_swap_local_e;
619	//assign ILA_DATA[193]=rml_irf_kill_restore_w;
620	//assign ILA_DATA[195:194]=rml_irf_cwpswap_tid_e;
621	//assign ILA_DATA[197:196]=rml_irf_old_agp;
622	//assign ILA_DATA[199:198]=rml_irf_new_agp;
623	//assign ILA_DATA[200]=rml_irf_swap_global;
624	//assign ILA_DATA[202:201]=rml_irf_global_tid;
625	//assign ILA_DATA[274:203]=irf_byp_rs1_data_d_l_ref;
626	//assign ILA_DATA[346:275]=irf_byp_rs2_data_d_l_ref;
627	//assign ILA_DATA[418:347]=irf_byp_rs3_data_d_l_ref;
628	//assign ILA_DATA[450:419]=irf_byp_rs3h_data_d_l_ref;
629	//assign ILA_DATA[522:451]=irf_byp_rs1_data_d_l_fpga;
630	//assign ILA_DATA[594:523]=irf_byp_rs2_data_d_l_fpga;
631	//assign ILA_DATA[666:595]=irf_byp_rs3_data_d_l_fpga;
632	//assign ILA_DATA[698:667]=irf_byp_rs3h_data_d_l_fpga;
633	//assign ILA_DATA[702:699]=syndrome;// && read_known0;
634	//assign ILA_DATA[705:703]=current_cwp[2:0];
635	//assign ILA_DATA[706]=0;
636	//assign ILA_DATA[737:707]={cnt[14:0],err_cnt};
637	//assign ILA_DATA[738]=rml_irf_swap_local_e && (current_window!=rml_irf_old_lo_cwp_e);
638	//assign ILA_DATA[699]=(irf_byp_rs1_data_d_l_fpga!=irf_byp_rs1_data_d_l_fpga_d) && (irf_byp_rs1_data_d_l==irf_byp_rs1_data_d_l_d);
639	//assign ILA_DATA[700]=(irf_byp_rs2_data_d_l_fpga!=irf_byp_rs2_data_d_l_fpga_d) && (irf_byp_rs2_data_d_l==irf_byp_rs2_data_d_l_d);
640	//assign ILA_DATA[701]=(irf_byp_rs3_data_d_l_fpga!=irf_byp_rs3_data_d_l_fpga_d) && (irf_byp_rs3_data_d_l==irf_byp_rs3_data_d_l_d);
641	//assign ILA_DATA[702]=(irf_byp_rs3h_data_d_l_fpga!=irf_byp_rs3h_data_d_l_fpga_d) && (irf_byp_rs3h_data_d_l==irf_byp_rs3h_data_d_l_d);
642	*/
643	wire [11:0] current_cwp;
644
645	bw_r_irf_fpga1 irf(
646
647	.current_cwp(current_cwp[11:0]),
648	.so (short_scan0_1),
649	.si (short_si0),
650	.reset_l (arst_l),
651	.rst_tri_en (mem_write_disable),
652	.rml_irf_old_e_cwp_e (rml_irf_old_e_cwp_e[1:0]),
653	.rml_irf_new_e_cwp_e (rml_irf_new_e_cwp_e[1:0]),
654	/AUTOINST/
655	// Outputs
656	.irf_byp_rs1_data_d_l (irf_byp_rs1_data_d_l_fpga[71:0]),
657	.irf_byp_rs2_data_d_l (irf_byp_rs2_data_d_l_fpga[71:0]),
658	.irf_byp_rs3_data_d_l (irf_byp_rs3_data_d_l_fpga[71:0]),
659	.irf_byp_rs3h_data_d_l (irf_byp_rs3h_data_d_l_fpga[31:0]),
660	// Inputs
661	.rclk (rclk),
662	//.rclk2x (rclk2x),
663	.se (se),
664	.sehold (sehold),
665	.ifu_exu_tid_s2 (ifu_exu_tid_s2[1:0]),
666	.ifu_exu_rs1_s (ifu_exu_rs1_s[4:0]),
667	.ifu_exu_rs2_s (ifu_exu_rs2_s[4:0]),
668	.ifu_exu_rs3_s (ifu_exu_rs3_s[4:0]),
669	.ifu_exu_ren1_s (ifu_exu_ren1_s),
670	.ifu_exu_ren2_s (ifu_exu_ren2_s),
671	.ifu_exu_ren3_s (ifu_exu_ren3_s),
672	.ecl_irf_wen_w (ecl_irf_wen_w),
673	.ecl_irf_wen_w2 (ecl_irf_wen_w2),
674	.ecl_irf_rd_m (ecl_irf_rd_m[4:0]),
675	.ecl_irf_rd_g (ecl_irf_rd_g[4:0]),
676	.byp_irf_rd_data_w (byp_irf_rd_data_w[71:0]),
677	.byp_irf_rd_data_w2 (byp_irf_rd_data_w2[71:0]),
678	.ecl_irf_tid_m (ecl_irf_tid_m[1:0]),
679	.ecl_irf_tid_g (ecl_irf_tid_g[1:0]),
680	.rml_irf_old_lo_cwp_e (rml_irf_old_lo_cwp_e[2:0]),
681	.rml_irf_new_lo_cwp_e (rml_irf_new_lo_cwp_e[2:0]),
682	.rml_irf_swap_even_e (rml_irf_swap_even_e),
683	.rml_irf_swap_odd_e (rml_irf_swap_odd_e),
684	.rml_irf_swap_local_e (rml_irf_swap_local_e),
685	.rml_irf_kill_restore_w (rml_irf_kill_restore_w),
686	.rml_irf_cwpswap_tid_e (rml_irf_cwpswap_tid_e[1:0]),
687	.rml_irf_old_agp (rml_irf_old_agp[1:0]),
688	.rml_irf_new_agp (rml_irf_new_agp[1:0]),
689	.rml_irf_swap_global (rml_irf_swap_global),
690	.rml_irf_global_tid (rml_irf_global_tid[1:0]));
691
692	/* bw_r_irf irf(
693	.so (short_scan0_1),
694	.si (short_si0),
695	.reset_l (arst_l),
696	.rst_tri_en (mem_write_disable),
697	.rml_irf_old_e_cwp_e (rml_irf_old_e_cwp_e[1:0]),
698	.rml_irf_new_e_cwp_e (rml_irf_new_e_cwp_e[1:0]),
699	// Outputs
700	.irf_byp_rs1_data_d_l (irf_byp_rs1_data_d_l_ref[71:0]),
701	.irf_byp_rs2_data_d_l (irf_byp_rs2_data_d_l_ref[71:0]),
702	.irf_byp_rs3_data_d_l (irf_byp_rs3_data_d_l_ref[71:0]),
703	.irf_byp_rs3h_data_d_l (irf_byp_rs3h_data_d_l_ref[31:0]),
704	// Inputs
705	.rclk (rclk),
706	.se (se),
707	.sehold (sehold),
708	.ifu_exu_tid_s2 (ifu_exu_tid_s2[1:0]),
709	.ifu_exu_rs1_s (ifu_exu_rs1_s[4:0]),
710	.ifu_exu_rs2_s (ifu_exu_rs2_s[4:0]),
711	.ifu_exu_rs3_s (ifu_exu_rs3_s[4:0]),
712	.ifu_exu_ren1_s (ifu_exu_ren1_s),
713	.ifu_exu_ren2_s (ifu_exu_ren2_s),
714	.ifu_exu_ren3_s (ifu_exu_ren3_s),
715	.ecl_irf_wen_w (ecl_irf_wen_w),
716	.ecl_irf_wen_w2 (ecl_irf_wen_w2),
717	.ecl_irf_rd_m (ecl_irf_rd_m[4:0]),
718	.ecl_irf_rd_g (ecl_irf_rd_g[4:0]),
719	.byp_irf_rd_data_w (byp_irf_rd_data_w[71:0]),
720	.byp_irf_rd_data_w2 (byp_irf_rd_data_w2[71:0]),
721	.ecl_irf_tid_m (ecl_irf_tid_m[1:0]),
722	.ecl_irf_tid_g (ecl_irf_tid_g[1:0]),
723	.rml_irf_old_lo_cwp_e (rml_irf_old_lo_cwp_e[2:0]),
724	.rml_irf_new_lo_cwp_e (rml_irf_new_lo_cwp_e[2:0]),
725	.rml_irf_swap_even_e (rml_irf_swap_even_e),
726	.rml_irf_swap_odd_e (rml_irf_swap_odd_e),
727	.rml_irf_swap_local_e (rml_irf_swap_local_e),
728	.rml_irf_kill_restore_w (rml_irf_kill_restore_w),
729	.rml_irf_cwpswap_tid_e (rml_irf_cwpswap_tid_e[1:0]),
730	.rml_irf_old_agp (rml_irf_old_agp[1:0]),
731	.rml_irf_new_agp (rml_irf_new_agp[1:0]),
732	.rml_irf_swap_global (rml_irf_swap_global),
733	.rml_irf_global_tid (rml_irf_global_tid[1:0]));*/
734
735	assign irf_byp_rs1_data_d_l=/((err_cnt>=ref_cnt[15:0]) && (cnt[19:0]>=ref_cnt[35:16])) && allow[0] ? irf_byp_rs1_data_d_l_ref:/irf_byp_rs1_data_d_l_fpga;
736	assign irf_byp_rs2_data_d_l=/((err_cnt>=ref_cnt[15:0]) && (cnt[19:0]>=ref_cnt[35:16])) && allow[1] ? irf_byp_rs2_data_d_l_ref:/irf_byp_rs2_data_d_l_fpga;
737	assign irf_byp_rs3_data_d_l=/((err_cnt>=ref_cnt[15:0]) && (cnt[19:0]>=ref_cnt[35:16])) && allow[2] ? irf_byp_rs3_data_d_l_ref:/irf_byp_rs3_data_d_l_fpga;
738	assign irf_byp_rs3h_data_d_l=/((err_cnt>=ref_cnt[15:0]) && (cnt[19:0]>=ref_cnt[35:16])) && allow[3] ? irf_byp_rs3h_data_d_l_ref:/irf_byp_rs3h_data_d_l_fpga;
739
740	`else
741	bw_r_irf irf(
742	.so (short_scan0_1),
743	.si (short_si0),
744	.reset_l (arst_l),
745	.rst_tri_en (mem_write_disable),
746	.rml_irf_old_e_cwp_e (rml_irf_old_e_cwp_e[1:0]),
747	.rml_irf_new_e_cwp_e (rml_irf_new_e_cwp_e[1:0]),
748	/AUTOINST/
749	// Outputs
750	.irf_byp_rs1_data_d_l (irf_byp_rs1_data_d_l[71:0]),
751	.irf_byp_rs2_data_d_l (irf_byp_rs2_data_d_l[71:0]),
752	.irf_byp_rs3_data_d_l (irf_byp_rs3_data_d_l[71:0]),
753	.irf_byp_rs3h_data_d_l (irf_byp_rs3h_data_d_l[31:0]),
754	// Inputs
755	.rclk (rclk),
756	.se (se),
757	.sehold (sehold),
758	.ifu_exu_tid_s2 (ifu_exu_tid_s2[1:0]),
759	.ifu_exu_rs1_s (ifu_exu_rs1_s[4:0]),
760	.ifu_exu_rs2_s (ifu_exu_rs2_s[4:0]),
761	.ifu_exu_rs3_s (ifu_exu_rs3_s[4:0]),
762	.ifu_exu_ren1_s (ifu_exu_ren1_s),
763	.ifu_exu_ren2_s (ifu_exu_ren2_s),
764	.ifu_exu_ren3_s (ifu_exu_ren3_s),
765	.ecl_irf_wen_w (ecl_irf_wen_w),
766	.ecl_irf_wen_w2 (ecl_irf_wen_w2),
767	.ecl_irf_rd_m (ecl_irf_rd_m[4:0]),
768	.ecl_irf_rd_g (ecl_irf_rd_g[4:0]),
769	.byp_irf_rd_data_w (byp_irf_rd_data_w[71:0]),
770	.byp_irf_rd_data_w2 (byp_irf_rd_data_w2[71:0]),
771	.ecl_irf_tid_m (ecl_irf_tid_m[1:0]),
772	.ecl_irf_tid_g (ecl_irf_tid_g[1:0]),
773	.rml_irf_old_lo_cwp_e (rml_irf_old_lo_cwp_e[2:0]),
774	.rml_irf_new_lo_cwp_e (rml_irf_new_lo_cwp_e[2:0]),
775	.rml_irf_swap_even_e (rml_irf_swap_even_e),
776	.rml_irf_swap_odd_e (rml_irf_swap_odd_e),
777	.rml_irf_swap_local_e (rml_irf_swap_local_e),
778	.rml_irf_kill_restore_w (rml_irf_kill_restore_w),
779	.rml_irf_cwpswap_tid_e (rml_irf_cwpswap_tid_e[1:0]),
780	.rml_irf_old_agp (rml_irf_old_agp[1:0]),
781	.rml_irf_new_agp (rml_irf_new_agp[1:0]),
782	.rml_irf_swap_global (rml_irf_swap_global),
783	.rml_irf_global_tid (rml_irf_global_tid[1:0]));
784	`endif
785
786	sparc_exu_byp bypass(
787	.so (short_so1),
788	.si (short_si1),
789	.byp_alu_rs2_data_e(byp_alu_rs2_data_e[63:0]),
790	/AUTOINST/
791	// Outputs
792	.byp_alu_rs1_data_e(byp_alu_rs1_data_e[63:0]),
793	.byp_alu_rs2_data_e_l(byp_alu_rs2_data_e_l[63:0]),
794	.exu_lsu_rs3_data_e(exu_lsu_rs3_data_e[63:0]),
795	.exu_spu_rs3_data_e(exu_spu_rs3_data_e[63:0]),
796	.exu_lsu_rs2_data_e(exu_lsu_rs2_data_e[63:0]),
797	.byp_alu_rcc_data_e(byp_alu_rcc_data_e[63:0]),
798	.byp_irf_rd_data_w(byp_irf_rd_data_w[71:0]),
799	.exu_tlu_wsr_data_m(exu_tlu_wsr_data_m[63:0]),
800	.byp_irf_rd_data_w2(byp_irf_rd_data_w2[71:0]),
801	.byp_ecc_rs3_data_e(byp_ecc_rs3_data_e[63:0]),
802	.byp_ecc_rcc_data_e(byp_ecc_rcc_data_e[63:0]),
803	.byp_ecl_rs2_31_e(byp_ecl_rs2_31_e),
804	.byp_ecl_rs1_31_e(byp_ecl_rs1_31_e),
805	.byp_ecl_rs1_63_e(byp_ecl_rs1_63_e),
806	.byp_ecl_rs1_2_0_e(byp_ecl_rs1_2_0_e[2:0]),
807	.byp_ecl_rs2_3_0_e(byp_ecl_rs2_3_0_e[3:0]),
808	.byp_ecc_rs1_synd_d(byp_ecc_rs1_synd_d[7:0]),
809	.byp_ecc_rs2_synd_d(byp_ecc_rs2_synd_d[7:0]),
810	.byp_ecc_rs3_synd_d(byp_ecc_rs3_synd_d[7:0]),
811	// Inputs
812	.rclk (rclk),
813	.se (se),
814	.sehold (sehold),
815	.ecl_byp_rs1_mux2_sel_e(ecl_byp_rs1_mux2_sel_e),
816	.ecl_byp_rs1_mux2_sel_rf(ecl_byp_rs1_mux2_sel_rf),
817	.ecl_byp_rs1_mux2_sel_ld(ecl_byp_rs1_mux2_sel_ld),
818	.ecl_byp_rs1_mux2_sel_usemux1(ecl_byp_rs1_mux2_sel_usemux1),
819	.ecl_byp_rs1_mux1_sel_m(ecl_byp_rs1_mux1_sel_m),
820	.ecl_byp_rs1_mux1_sel_w(ecl_byp_rs1_mux1_sel_w),
821	.ecl_byp_rs1_mux1_sel_w2(ecl_byp_rs1_mux1_sel_w2),
822	.ecl_byp_rs1_mux1_sel_other(ecl_byp_rs1_mux1_sel_other),
823	.ecl_byp_rcc_mux2_sel_e(ecl_byp_rcc_mux2_sel_e),
824	.ecl_byp_rcc_mux2_sel_rf(ecl_byp_rcc_mux2_sel_rf),
825	.ecl_byp_rcc_mux2_sel_ld(ecl_byp_rcc_mux2_sel_ld),
826	.ecl_byp_rcc_mux2_sel_usemux1(ecl_byp_rcc_mux2_sel_usemux1),
827	.ecl_byp_rcc_mux1_sel_m(ecl_byp_rcc_mux1_sel_m),
828	.ecl_byp_rcc_mux1_sel_w(ecl_byp_rcc_mux1_sel_w),
829	.ecl_byp_rcc_mux1_sel_w2(ecl_byp_rcc_mux1_sel_w2),
830	.ecl_byp_rcc_mux1_sel_other(ecl_byp_rcc_mux1_sel_other),
831	.ecl_byp_rs2_mux2_sel_e(ecl_byp_rs2_mux2_sel_e),
832	.ecl_byp_rs2_mux2_sel_rf(ecl_byp_rs2_mux2_sel_rf),
833	.ecl_byp_rs2_mux2_sel_ld(ecl_byp_rs2_mux2_sel_ld),
834	.ecl_byp_rs2_mux2_sel_usemux1(ecl_byp_rs2_mux2_sel_usemux1),
835	.ecl_byp_rs2_mux1_sel_m(ecl_byp_rs2_mux1_sel_m),
836	.ecl_byp_rs2_mux1_sel_w(ecl_byp_rs2_mux1_sel_w),
837	.ecl_byp_rs2_mux1_sel_w2(ecl_byp_rs2_mux1_sel_w2),
838	.ecl_byp_rs2_mux1_sel_other(ecl_byp_rs2_mux1_sel_other),
839	.ecl_byp_rs3_mux2_sel_e(ecl_byp_rs3_mux2_sel_e),
840	.ecl_byp_rs3_mux2_sel_rf(ecl_byp_rs3_mux2_sel_rf),
841	.ecl_byp_rs3_mux2_sel_ld(ecl_byp_rs3_mux2_sel_ld),
842	.ecl_byp_rs3_mux2_sel_usemux1(ecl_byp_rs3_mux2_sel_usemux1),
843	.ecl_byp_rs3_mux1_sel_m(ecl_byp_rs3_mux1_sel_m),
844	.ecl_byp_rs3_mux1_sel_w(ecl_byp_rs3_mux1_sel_w),
845	.ecl_byp_rs3_mux1_sel_w2(ecl_byp_rs3_mux1_sel_w2),
846	.ecl_byp_rs3_mux1_sel_other(ecl_byp_rs3_mux1_sel_other),
847	.ecl_byp_rs3h_mux2_sel_e(ecl_byp_rs3h_mux2_sel_e),
848	.ecl_byp_rs3h_mux2_sel_rf(ecl_byp_rs3h_mux2_sel_rf),
849	.ecl_byp_rs3h_mux2_sel_ld(ecl_byp_rs3h_mux2_sel_ld),
850	.ecl_byp_rs3h_mux2_sel_usemux1(ecl_byp_rs3h_mux2_sel_usemux1),
851	.ecl_byp_rs3h_mux1_sel_m(ecl_byp_rs3h_mux1_sel_m),
852	.ecl_byp_rs3h_mux1_sel_w(ecl_byp_rs3h_mux1_sel_w),
853	.ecl_byp_rs3h_mux1_sel_w2(ecl_byp_rs3h_mux1_sel_w2),
854	.ecl_byp_rs3h_mux1_sel_other(ecl_byp_rs3h_mux1_sel_other),
855	.ecl_byp_rs1_longmux_sel_g2(ecl_byp_rs1_longmux_sel_g2),
856	.ecl_byp_rs1_longmux_sel_w2(ecl_byp_rs1_longmux_sel_w2),
857	.ecl_byp_rs1_longmux_sel_ldxa(ecl_byp_rs1_longmux_sel_ldxa),
858	.ecl_byp_rs2_longmux_sel_g2(ecl_byp_rs2_longmux_sel_g2),
859	.ecl_byp_rs2_longmux_sel_w2(ecl_byp_rs2_longmux_sel_w2),
860	.ecl_byp_rs2_longmux_sel_ldxa(ecl_byp_rs2_longmux_sel_ldxa),
861	.ecl_byp_rs3_longmux_sel_g2(ecl_byp_rs3_longmux_sel_g2),
862	.ecl_byp_rs3_longmux_sel_w2(ecl_byp_rs3_longmux_sel_w2),
863	.ecl_byp_rs3_longmux_sel_ldxa(ecl_byp_rs3_longmux_sel_ldxa),
864	.ecl_byp_rs3h_longmux_sel_g2(ecl_byp_rs3h_longmux_sel_g2),
865	.ecl_byp_rs3h_longmux_sel_w2(ecl_byp_rs3h_longmux_sel_w2),
866	.ecl_byp_rs3h_longmux_sel_ldxa(ecl_byp_rs3h_longmux_sel_ldxa),
867	.ecl_byp_sel_load_m(ecl_byp_sel_load_m),
868	.ecl_byp_sel_pipe_m(ecl_byp_sel_pipe_m),
869	.ecl_byp_sel_ecc_m(ecl_byp_sel_ecc_m),
870	.ecl_byp_sel_muldiv_g(ecl_byp_sel_muldiv_g),
871	.ecl_byp_sel_load_g(ecl_byp_sel_load_g),
872	.ecl_byp_sel_restore_g(ecl_byp_sel_restore_g),
873	.ecl_byp_std_e_l(ecl_byp_std_e_l),
874	.ecl_byp_ldxa_g (ecl_byp_ldxa_g),
875	.alu_byp_rd_data_e(alu_byp_rd_data_e[63:0]),
876	.ifu_exu_imm_data_d(ifu_exu_imm_data_d[31:0]),
877	.irf_byp_rs1_data_d_l(irf_byp_rs1_data_d_l[71:0]),
878	.irf_byp_rs2_data_d_l(irf_byp_rs2_data_d_l[71:0]),
879	.irf_byp_rs3_data_d_l(irf_byp_rs3_data_d_l[71:0]),
880	.irf_byp_rs3h_data_d_l(irf_byp_rs3h_data_d_l[31:0]),
881	.lsu_exu_dfill_data_g(lsu_exu_dfill_data_g[63:0]),
882	.lsu_exu_ldxa_data_g(lsu_exu_ldxa_data_g[63:0]),
883	.div_byp_muldivout_g(div_byp_muldivout_g[63:0]),
884	.ecc_byp_ecc_result_m(ecc_byp_ecc_result_m[63:0]),
885	.ecl_byp_ecc_mask_m_l(ecl_byp_ecc_mask_m_l[7:0]),
886	.ifu_exu_pc_d (ifu_exu_pc_d[47:0]),
887	.ecl_byp_3lsb_m (ecl_byp_3lsb_m[2:0]),
888	.ecl_byp_restore_m(ecl_byp_restore_m),
889	.ecl_byp_sel_restore_m(ecl_byp_sel_restore_m),
890	.ecl_byp_eclpr_e(ecl_byp_eclpr_e[7:0]),
891	.div_byp_yreg_e (div_byp_yreg_e[31:0]),
892	.ifu_exu_pcver_e(ifu_exu_pcver_e[63:0]),
893	.tlu_exu_rsr_data_m(tlu_exu_rsr_data_m[63:0]),
894	.ffu_exu_rsr_data_m(ffu_exu_rsr_data_m[63:0]),
895	.ecl_byp_sel_yreg_e(ecl_byp_sel_yreg_e),
896	.ecl_byp_sel_eclpr_e(ecl_byp_sel_eclpr_e),
897	.ecl_byp_sel_ifusr_e(ecl_byp_sel_ifusr_e),
898	.ecl_byp_sel_alu_e(ecl_byp_sel_alu_e),
899	.ecl_byp_sel_ifex_m(ecl_byp_sel_ifex_m),
900	.ecl_byp_sel_ffusr_m(ecl_byp_sel_ffusr_m),
901	.ecl_byp_sel_tlusr_m(ecl_byp_sel_tlusr_m));
902
903	sparc_exu_ecc ecc(
904	.so (scan0_1),
905	.si (si0),
906	.byp_alu_rs2_data_e(byp_alu_rs2_data_e[63:0]),
907	/AUTOINST/
908	// Outputs
909	.ecc_ecl_rs1_ce (ecc_ecl_rs1_ce),
910	.ecc_ecl_rs1_ue (ecc_ecl_rs1_ue),
911	.ecc_ecl_rs2_ce (ecc_ecl_rs2_ce),
912	.ecc_ecl_rs2_ue (ecc_ecl_rs2_ue),
913	.ecc_ecl_rs3_ce (ecc_ecl_rs3_ce),
914	.ecc_ecl_rs3_ue (ecc_ecl_rs3_ue),
915	.ecc_byp_ecc_result_m(ecc_byp_ecc_result_m[63:0]),
916	.exu_ifu_err_synd_m(exu_ifu_err_synd_m[6:0]),
917	// Inputs
918	.rclk (rclk),
919	.se (se),
920	.byp_ecc_rcc_data_e(byp_ecc_rcc_data_e[63:0]),
921	.ecl_ecc_rs1_use_rf_e(ecl_ecc_rs1_use_rf_e),
922	.byp_ecc_rs1_synd_d(byp_ecc_rs1_synd_d[7:0]),
923	.ecl_ecc_rs2_use_rf_e(ecl_ecc_rs2_use_rf_e),
924	.byp_ecc_rs2_synd_d(byp_ecc_rs2_synd_d[7:0]),
925	.byp_ecc_rs3_data_e(byp_ecc_rs3_data_e[63:0]),
926	.ecl_ecc_rs3_use_rf_e(ecl_ecc_rs3_use_rf_e),
927	.byp_ecc_rs3_synd_d(byp_ecc_rs3_synd_d[7:0]),
928	.ecl_ecc_sel_rs1_m_l(ecl_ecc_sel_rs1_m_l),
929	.ecl_ecc_sel_rs2_m_l(ecl_ecc_sel_rs2_m_l),
930	.ecl_ecc_sel_rs3_m_l(ecl_ecc_sel_rs3_m_l),
931	.ecl_ecc_log_rs1_m (ecl_ecc_log_rs1_m),
932	.ecl_ecc_log_rs2_m (ecl_ecc_log_rs2_m),
933	.ecl_ecc_log_rs3_m (ecl_ecc_log_rs3_m));
934
935	sparc_exu_ecl ecl(
936	.so (short_so0),
937	.si (short_scan0_1),
938	.rst_tri_en (mux_drive_disable),
939	.byp_ecl_wrccr_data_w(byp_irf_rd_data_w[7:0]),
940	.alu_ecl_adder_out_31_e(exu_ifu_brpc_e[31]),
941	.byp_ecl_rd_data_3lsb_m(exu_tlu_wsr_data_m[2:0]),
942	.alu_ecl_adder_out_7_0_e(exu_ifu_brpc_e[7:0]),
943	.exu_ifu_regz_e (exu_ifu_regz_e),
944	.ecl_alu_casa_e (ecl_alu_casa_e),
945	.exu_ifu_err_synd_7_m (exu_ifu_err_synd_m[7]),
946	/AUTOINST/
947	// Outputs
948	.ecl_byp_ecc_mask_m_l(ecl_byp_ecc_mask_m_l[7:0]),
949	.ecl_byp_eclpr_e (ecl_byp_eclpr_e[7:0]),
950	.ecl_byp_sel_load_g(ecl_byp_sel_load_g),
951	.ecl_byp_sel_load_m(ecl_byp_sel_load_m),
952	.ecl_byp_sel_muldiv_g(ecl_byp_sel_muldiv_g),
953	.ecl_byp_sel_pipe_m(ecl_byp_sel_pipe_m),
954	.ecl_byp_sel_restore_g(ecl_byp_sel_restore_g),
955	.ecl_byp_sel_restore_m(ecl_byp_sel_restore_m),
956	.ecl_div_almostlast_cycle(ecl_div_almostlast_cycle),
957	.ecl_div_cin (ecl_div_cin),
958	.ecl_div_dividend_sign(ecl_div_dividend_sign),
959	.ecl_div_keep_d (ecl_div_keep_d),
960	.ecl_div_keepx (ecl_div_keepx),
961	.ecl_div_last_cycle(ecl_div_last_cycle),
962	.ecl_div_mul_get_32bit_data(ecl_div_mul_get_32bit_data),
963	.ecl_div_mul_get_new_data(ecl_div_mul_get_new_data),
964	.ecl_div_mul_keep_data(ecl_div_mul_keep_data),
965	.ecl_div_mul_sext_rs1_e(ecl_div_mul_sext_rs1_e),
966	.ecl_div_mul_sext_rs2_e(ecl_div_mul_sext_rs2_e),
967	.ecl_div_newq (ecl_div_newq),
968	.ecl_div_sel_64b (ecl_div_sel_64b),
969	.ecl_div_sel_adder (ecl_div_sel_adder),
970	.ecl_div_sel_neg32 (ecl_div_sel_neg32),
971	.ecl_div_sel_pos32 (ecl_div_sel_pos32),
972	.ecl_div_sel_u32 (ecl_div_sel_u32),
973	.ecl_div_subtract_l(ecl_div_subtract_l),
974	.ecl_div_upper32_zero(ecl_div_upper32_zero),
975	.ecl_div_upper33_one(ecl_div_upper33_one),
976	.ecl_div_upper33_zero(ecl_div_upper33_zero),
977	.ecl_div_xinmask (ecl_div_xinmask),
978	.ecl_div_yreg_shift_g(ecl_div_yreg_shift_g[3:0]),
979	.ecl_div_yreg_wen_g(ecl_div_yreg_wen_g[3:0]),
980	.ecl_div_yreg_wen_l(ecl_div_yreg_wen_l[3:0]),
981	.ecl_div_yreg_wen_w(ecl_div_yreg_wen_w[3:0]),
982	.ecl_ecc_log_rs1_m (ecl_ecc_log_rs1_m),
983	.ecl_ecc_log_rs2_m (ecl_ecc_log_rs2_m),
984	.ecl_ecc_log_rs3_m (ecl_ecc_log_rs3_m),
985	.ecl_ecc_sel_rs1_m_l(ecl_ecc_sel_rs1_m_l),
986	.ecl_ecc_sel_rs2_m_l(ecl_ecc_sel_rs2_m_l),
987	.ecl_ecc_sel_rs3_m_l(ecl_ecc_sel_rs3_m_l),
988	.ecl_rml_canrestore_wen_w(ecl_rml_canrestore_wen_w),
989	.ecl_rml_cansave_wen_w(ecl_rml_cansave_wen_w),
990	.ecl_rml_cleanwin_wen_w(ecl_rml_cleanwin_wen_w),
991	.ecl_rml_cwp_wen_e (ecl_rml_cwp_wen_e),
992	.ecl_rml_otherwin_wen_w(ecl_rml_otherwin_wen_w),
993	.ecl_rml_wstate_wen_w(ecl_rml_wstate_wen_w),
994	.exu_ffu_wsr_inst_e(exu_ffu_wsr_inst_e),
995	.exu_ifu_ecc_ce_m (exu_ifu_ecc_ce_m),
996	.exu_ifu_ecc_ue_m (exu_ifu_ecc_ue_m),
997	.exu_ifu_err_reg_m (exu_ifu_err_reg_m[7:0]),
998	.exu_ifu_inj_ack (exu_ifu_inj_ack),
999	.exu_ifu_longop_done_g(exu_ifu_longop_done_g[3:0]),
1000	.exu_mul_input_vld (exu_mul_input_vld),
1001	.exu_tlu_ccr0_w (exu_tlu_ccr0_w[7:0]),
1002	.exu_tlu_ccr1_w (exu_tlu_ccr1_w[7:0]),
1003	.exu_tlu_ccr2_w (exu_tlu_ccr2_w[7:0]),
1004	.exu_tlu_ccr3_w (exu_tlu_ccr3_w[7:0]),
1005	.ecl_byp_sel_alu_e (ecl_byp_sel_alu_e),
1006	.ecl_byp_sel_eclpr_e(ecl_byp_sel_eclpr_e),
1007	.ecl_byp_sel_yreg_e(ecl_byp_sel_yreg_e),
1008	.ecl_byp_sel_ifusr_e(ecl_byp_sel_ifusr_e),
1009	.ecl_byp_sel_ffusr_m(ecl_byp_sel_ffusr_m),
1010	.ecl_byp_sel_ifex_m(ecl_byp_sel_ifex_m),
1011	.ecl_byp_sel_tlusr_m(ecl_byp_sel_tlusr_m),
1012	.exu_ifu_va_oor_m (exu_ifu_va_oor_m),
1013	.ecl_alu_out_sel_sum_e_l(ecl_alu_out_sel_sum_e_l),
1014	.ecl_alu_out_sel_rs3_e_l(ecl_alu_out_sel_rs3_e_l),
1015	.ecl_alu_out_sel_shift_e_l(ecl_alu_out_sel_shift_e_l),
1016	.ecl_alu_out_sel_logic_e_l(ecl_alu_out_sel_logic_e_l),
1017	.ecl_alu_log_sel_and_e(ecl_alu_log_sel_and_e),
1018	.ecl_alu_log_sel_or_e(ecl_alu_log_sel_or_e),
1019	.ecl_alu_log_sel_xor_e(ecl_alu_log_sel_xor_e),
1020	.ecl_alu_log_sel_move_e(ecl_alu_log_sel_move_e),
1021	.ecl_alu_sethi_inst_e(ecl_alu_sethi_inst_e),
1022	.ecl_alu_cin_e (ecl_alu_cin_e),
1023	.ecl_shft_lshift_e_l(ecl_shft_lshift_e_l),
1024	.ecl_shft_op32_e (ecl_shft_op32_e),
1025	.ecl_shft_shift4_e (ecl_shft_shift4_e[3:0]),
1026	.ecl_shft_shift1_e (ecl_shft_shift1_e[3:0]),
1027	.ecl_shft_enshift_e_l(ecl_shft_enshift_e_l),
1028	.ecl_byp_restore_m (ecl_byp_restore_m),
1029	.ecl_byp_rs1_mux2_sel_e(ecl_byp_rs1_mux2_sel_e),
1030	.ecl_byp_rs1_mux2_sel_rf(ecl_byp_rs1_mux2_sel_rf),
1031	.ecl_byp_rs1_mux2_sel_ld(ecl_byp_rs1_mux2_sel_ld),
1032	.ecl_byp_rs1_mux2_sel_usemux1(ecl_byp_rs1_mux2_sel_usemux1),
1033	.ecl_byp_rs1_mux1_sel_m(ecl_byp_rs1_mux1_sel_m),
1034	.ecl_byp_rs1_mux1_sel_w(ecl_byp_rs1_mux1_sel_w),
1035	.ecl_byp_rs1_mux1_sel_w2(ecl_byp_rs1_mux1_sel_w2),
1036	.ecl_byp_rs1_mux1_sel_other(ecl_byp_rs1_mux1_sel_other),
1037	.ecl_byp_rcc_mux2_sel_e(ecl_byp_rcc_mux2_sel_e),
1038	.ecl_byp_rcc_mux2_sel_rf(ecl_byp_rcc_mux2_sel_rf),
1039	.ecl_byp_rcc_mux2_sel_ld(ecl_byp_rcc_mux2_sel_ld),
1040	.ecl_byp_rcc_mux2_sel_usemux1(ecl_byp_rcc_mux2_sel_usemux1),
1041	.ecl_byp_rcc_mux1_sel_m(ecl_byp_rcc_mux1_sel_m),
1042	.ecl_byp_rcc_mux1_sel_w(ecl_byp_rcc_mux1_sel_w),
1043	.ecl_byp_rcc_mux1_sel_w2(ecl_byp_rcc_mux1_sel_w2),
1044	.ecl_byp_rcc_mux1_sel_other(ecl_byp_rcc_mux1_sel_other),
1045	.ecl_byp_rs2_mux2_sel_e(ecl_byp_rs2_mux2_sel_e),
1046	.ecl_byp_rs2_mux2_sel_rf(ecl_byp_rs2_mux2_sel_rf),
1047	.ecl_byp_rs2_mux2_sel_ld(ecl_byp_rs2_mux2_sel_ld),
1048	.ecl_byp_rs2_mux2_sel_usemux1(ecl_byp_rs2_mux2_sel_usemux1),
1049	.ecl_byp_rs2_mux1_sel_m(ecl_byp_rs2_mux1_sel_m),
1050	.ecl_byp_rs2_mux1_sel_w(ecl_byp_rs2_mux1_sel_w),
1051	.ecl_byp_rs2_mux1_sel_w2(ecl_byp_rs2_mux1_sel_w2),
1052	.ecl_byp_rs2_mux1_sel_other(ecl_byp_rs2_mux1_sel_other),
1053	.ecl_byp_rs3_mux2_sel_e(ecl_byp_rs3_mux2_sel_e),
1054	.ecl_byp_rs3_mux2_sel_rf(ecl_byp_rs3_mux2_sel_rf),
1055	.ecl_byp_rs3_mux2_sel_ld(ecl_byp_rs3_mux2_sel_ld),
1056	.ecl_byp_rs3_mux2_sel_usemux1(ecl_byp_rs3_mux2_sel_usemux1),
1057	.ecl_byp_rs3_mux1_sel_m(ecl_byp_rs3_mux1_sel_m),
1058	.ecl_byp_rs3_mux1_sel_w(ecl_byp_rs3_mux1_sel_w),
1059	.ecl_byp_rs3_mux1_sel_w2(ecl_byp_rs3_mux1_sel_w2),
1060	.ecl_byp_rs3_mux1_sel_other(ecl_byp_rs3_mux1_sel_other),
1061	.ecl_byp_rs3h_mux2_sel_e(ecl_byp_rs3h_mux2_sel_e),
1062	.ecl_byp_rs3h_mux2_sel_rf(ecl_byp_rs3h_mux2_sel_rf),
1063	.ecl_byp_rs3h_mux2_sel_ld(ecl_byp_rs3h_mux2_sel_ld),
1064	.ecl_byp_rs3h_mux2_sel_usemux1(ecl_byp_rs3h_mux2_sel_usemux1),
1065	.ecl_byp_rs3h_mux1_sel_m(ecl_byp_rs3h_mux1_sel_m),
1066	.ecl_byp_rs3h_mux1_sel_w(ecl_byp_rs3h_mux1_sel_w),
1067	.ecl_byp_rs3h_mux1_sel_w2(ecl_byp_rs3h_mux1_sel_w2),
1068	.ecl_byp_rs3h_mux1_sel_other(ecl_byp_rs3h_mux1_sel_other),
1069	.ecl_byp_rs1_longmux_sel_g2(ecl_byp_rs1_longmux_sel_g2),
1070	.ecl_byp_rs1_longmux_sel_w2(ecl_byp_rs1_longmux_sel_w2),
1071	.ecl_byp_rs1_longmux_sel_ldxa(ecl_byp_rs1_longmux_sel_ldxa),
1072	.ecl_byp_rs2_longmux_sel_g2(ecl_byp_rs2_longmux_sel_g2),
1073	.ecl_byp_rs2_longmux_sel_w2(ecl_byp_rs2_longmux_sel_w2),
1074	.ecl_byp_rs2_longmux_sel_ldxa(ecl_byp_rs2_longmux_sel_ldxa),
1075	.ecl_byp_rs3_longmux_sel_g2(ecl_byp_rs3_longmux_sel_g2),
1076	.ecl_byp_rs3_longmux_sel_w2(ecl_byp_rs3_longmux_sel_w2),
1077	.ecl_byp_rs3_longmux_sel_ldxa(ecl_byp_rs3_longmux_sel_ldxa),
1078	.ecl_byp_rs3h_longmux_sel_g2(ecl_byp_rs3h_longmux_sel_g2),
1079	.ecl_byp_rs3h_longmux_sel_w2(ecl_byp_rs3h_longmux_sel_w2),
1080	.ecl_byp_rs3h_longmux_sel_ldxa(ecl_byp_rs3h_longmux_sel_ldxa),
1081	.ecl_byp_std_e_l (ecl_byp_std_e_l),
1082	.ecl_byp_ldxa_g (ecl_byp_ldxa_g),
1083	.ecl_byp_3lsb_m (ecl_byp_3lsb_m[2:0]),
1084	.ecl_ecc_rs1_use_rf_e(ecl_ecc_rs1_use_rf_e),
1085	.ecl_ecc_rs2_use_rf_e(ecl_ecc_rs2_use_rf_e),
1086	.ecl_ecc_rs3_use_rf_e(ecl_ecc_rs3_use_rf_e),
1087	.ecl_irf_rd_m (ecl_irf_rd_m[4:0]),
1088	.ecl_irf_tid_m (ecl_irf_tid_m[1:0]),
1089	.ecl_irf_wen_w (ecl_irf_wen_w),
1090	.ecl_irf_wen_w2 (ecl_irf_wen_w2),
1091	.ecl_irf_rd_g (ecl_irf_rd_g[4:0]),
1092	.ecl_irf_tid_g (ecl_irf_tid_g[1:0]),
1093	.ecl_div_thr_e (ecl_div_thr_e[3:0]),
1094	.ecl_rml_thr_m (ecl_rml_thr_m[3:0]),
1095	.ecl_rml_thr_w (ecl_rml_thr_w[3:0]),
1096	.ecl_rml_xor_data_e(ecl_rml_xor_data_e[2:0]),
1097	.ecl_div_ld_inputs (ecl_div_ld_inputs),
1098	.ecl_div_sel_div (ecl_div_sel_div),
1099	.ecl_div_div64 (ecl_div_div64),
1100	.exu_ifu_cc_d (exu_ifu_cc_d[7:0]),
1101	.ecl_shft_extendbit_e(ecl_shft_extendbit_e),
1102	.ecl_shft_extend32bit_e_l(ecl_shft_extend32bit_e_l),
1103	.ecl_div_zero_rs2_e(ecl_div_zero_rs2_e),
1104	.ecl_div_muls_rs1_31_e_l(ecl_div_muls_rs1_31_e_l),
1105	.ecl_div_yreg_data_31_g(ecl_div_yreg_data_31_g),
1106	.exu_tlu_va_oor_m (exu_tlu_va_oor_m),
1107	.exu_tlu_va_oor_jl_ret_m(exu_tlu_va_oor_jl_ret_m),
1108	.ecl_rml_kill_e (ecl_rml_kill_e),
1109	.ecl_rml_kill_w (ecl_rml_kill_w),
1110	.ecl_byp_sel_ecc_m (ecl_byp_sel_ecc_m),
1111	.exu_tlu_ttype_m (exu_tlu_ttype_m[8:0]),
1112	.exu_tlu_ttype_vld_m(exu_tlu_ttype_vld_m),
1113	.exu_tlu_ue_trap_m (exu_tlu_ue_trap_m),
1114	.exu_tlu_misalign_addr_jmpl_rtn_m(exu_tlu_misalign_addr_jmpl_rtn_m),
1115	.exu_lsu_priority_trap_m(exu_lsu_priority_trap_m),
1116	.ecl_div_mul_wen (ecl_div_mul_wen),
1117	.ecl_div_muls (ecl_div_muls),
1118	.ecl_rml_early_flush_w(ecl_rml_early_flush_w),
1119	.ecl_rml_inst_vld_w(ecl_rml_inst_vld_w),
1120	// Inputs
1121	.div_ecl_adder_out_31(div_ecl_adder_out_31),
1122	.div_ecl_cout32 (div_ecl_cout32),
1123	.div_ecl_cout64 (div_ecl_cout64),
1124	.div_ecl_d_62 (div_ecl_d_62),
1125	.div_ecl_d_msb (div_ecl_d_msb),
1126	.div_ecl_detect_zero_high(div_ecl_detect_zero_high),
1127	.div_ecl_detect_zero_low(div_ecl_detect_zero_low),
1128	.div_ecl_dividend_msb(div_ecl_dividend_msb),
1129	.div_ecl_gencc_in_31(div_ecl_gencc_in_31),
1130	.div_ecl_gencc_in_msb_l(div_ecl_gencc_in_msb_l),
1131	.div_ecl_low32_nonzero(div_ecl_low32_nonzero),
1132	.div_ecl_upper32_equal(div_ecl_upper32_equal),
1133	.div_ecl_x_msb (div_ecl_x_msb),
1134	.div_ecl_xin_msb_l (div_ecl_xin_msb_l),
1135	.ecc_ecl_rs1_ce (ecc_ecl_rs1_ce),
1136	.ecc_ecl_rs1_ue (ecc_ecl_rs1_ue),
1137	.ecc_ecl_rs2_ce (ecc_ecl_rs2_ce),
1138	.ecc_ecl_rs2_ue (ecc_ecl_rs2_ue),
1139	.ecc_ecl_rs3_ce (ecc_ecl_rs3_ce),
1140	.ecc_ecl_rs3_ue (ecc_ecl_rs3_ue),
1141	.ifu_exu_disable_ce_e(ifu_exu_disable_ce_e),
1142	.ifu_exu_ecc_mask (ifu_exu_ecc_mask[7:0]),
1143	.ifu_exu_inj_irferr(ifu_exu_inj_irferr),
1144	.ifu_exu_inst_vld_e(ifu_exu_inst_vld_e),
1145	.ifu_exu_inst_vld_w(ifu_exu_inst_vld_w),
1146	.ifu_exu_muldivop_d(ifu_exu_muldivop_d[4:0]),
1147	.ifu_exu_return_d (ifu_exu_return_d),
1148	.ifu_tlu_sraddr_d (ifu_tlu_sraddr_d[6:0]),
1149	.ifu_tlu_wsr_inst_d(ifu_tlu_wsr_inst_d),
1150	.lsu_exu_ldst_miss_g2(lsu_exu_ldst_miss_g2),
1151	.mul_exu_ack (mul_exu_ack),
1152	.rml_ecl_canrestore_d(rml_ecl_canrestore_d[2:0]),
1153	.rml_ecl_cansave_d (rml_ecl_cansave_d[2:0]),
1154	.rml_ecl_cleanwin_d(rml_ecl_cleanwin_d[2:0]),
1155	.rml_ecl_cwp_d (rml_ecl_cwp_d[2:0]),
1156	.rml_ecl_gl_e (rml_ecl_gl_e[1:0]),
1157	.rml_ecl_kill_m (rml_ecl_kill_m),
1158	.rml_ecl_otherwin_d(rml_ecl_otherwin_d[2:0]),
1159	.rml_ecl_rmlop_done_e(rml_ecl_rmlop_done_e),
1160	.rml_ecl_swap_done (rml_ecl_swap_done[3:0]),
1161	.rml_ecl_wstate_d (rml_ecl_wstate_d[5:0]),
1162	.sehold (sehold),
1163	.tlu_exu_ccr_m (tlu_exu_ccr_m[7:0]),
1164	.tlu_exu_cwpccr_update_m(tlu_exu_cwpccr_update_m),
1165	.rclk (rclk),
1166	.se (se),
1167	.grst_l (grst_l),
1168	.arst_l (arst_l),
1169	.ifu_exu_dbrinst_d (ifu_exu_dbrinst_d),
1170	.ifu_exu_aluop_d (ifu_exu_aluop_d[2:0]),
1171	.ifu_exu_shiftop_d (ifu_exu_shiftop_d[2:0]),
1172	.ifu_exu_invert_d (ifu_exu_invert_d),
1173	.ifu_exu_usecin_d (ifu_exu_usecin_d),
1174	.ifu_exu_enshift_d (ifu_exu_enshift_d),
1175	.byp_ecl_rs2_3_0_e (byp_ecl_rs2_3_0_e[3:0]),
1176	.byp_ecl_rs1_2_0_e (byp_ecl_rs1_2_0_e[2:0]),
1177	.ifu_exu_use_rsr_e_l(ifu_exu_use_rsr_e_l),
1178	.ifu_exu_rd_exusr_e(ifu_exu_rd_exusr_e),
1179	.ifu_exu_rd_ifusr_e(ifu_exu_rd_ifusr_e),
1180	.ifu_exu_rd_ffusr_e(ifu_exu_rd_ffusr_e),
1181	.ifu_exu_rs1_vld_d (ifu_exu_rs1_vld_d),
1182	.ifu_exu_rs2_vld_d (ifu_exu_rs2_vld_d),
1183	.ifu_exu_rs3e_vld_d(ifu_exu_rs3e_vld_d),
1184	.ifu_exu_rs3o_vld_d(ifu_exu_rs3o_vld_d),
1185	.ifu_exu_dontmv_regz0_e(ifu_exu_dontmv_regz0_e),
1186	.ifu_exu_dontmv_regz1_e(ifu_exu_dontmv_regz1_e),
1187	.ifu_exu_rd_d (ifu_exu_rd_d[4:0]),
1188	.ifu_exu_tid_s2 (ifu_exu_tid_s2[1:0]),
1189	.ifu_exu_kill_e (ifu_exu_kill_e),
1190	.ifu_exu_wen_d (ifu_exu_wen_d),
1191	.ifu_exu_ialign_d (ifu_exu_ialign_d),
1192	.alu_ecl_add_n64_e (alu_ecl_add_n64_e),
1193	.alu_ecl_add_n32_e (alu_ecl_add_n32_e),
1194	.alu_ecl_log_n64_e (alu_ecl_log_n64_e),
1195	.alu_ecl_log_n32_e (alu_ecl_log_n32_e),
1196	.alu_ecl_zhigh_e (alu_ecl_zhigh_e),
1197	.alu_ecl_zlow_e (alu_ecl_zlow_e),
1198	.ifu_exu_setcc_d (ifu_exu_setcc_d),
1199	.lsu_exu_dfill_vld_g(lsu_exu_dfill_vld_g),
1200	.lsu_exu_rd_m (lsu_exu_rd_m[4:0]),
1201	.lsu_exu_thr_m (lsu_exu_thr_m[1:0]),
1202	.lsu_exu_ldxa_m (lsu_exu_ldxa_m),
1203	.byp_ecl_rs1_31_e (byp_ecl_rs1_31_e),
1204	.byp_ecl_rs2_31_e (byp_ecl_rs2_31_e),
1205	.byp_ecl_rs1_63_e (byp_ecl_rs1_63_e),
1206	.alu_ecl_cout64_e_l(alu_ecl_cout64_e_l),
1207	.alu_ecl_cout32_e (alu_ecl_cout32_e),
1208	.alu_ecl_adder_out_63_e(alu_ecl_adder_out_63_e),
1209	.alu_ecl_adderin2_63_e(alu_ecl_adderin2_63_e),
1210	.alu_ecl_adderin2_31_e(alu_ecl_adderin2_31_e),
1211	.ifu_exu_rs1_s (ifu_exu_rs1_s[4:0]),
1212	.ifu_exu_rs2_s (ifu_exu_rs2_s[4:0]),
1213	.ifu_exu_rs3_s (ifu_exu_rs3_s[4:0]),
1214	.ifu_exu_tagop_d (ifu_exu_tagop_d),
1215	.ifu_exu_tv_d (ifu_exu_tv_d),
1216	.ifu_exu_muls_d (ifu_exu_muls_d),
1217	.div_ecl_yreg_0_l (div_ecl_yreg_0_l[3:0]),
1218	.alu_ecl_mem_addr_invalid_e_l(alu_ecl_mem_addr_invalid_e_l),
1219	.ifu_exu_range_check_jlret_d(ifu_exu_range_check_jlret_d),
1220	.ifu_exu_range_check_other_d(ifu_exu_range_check_other_d),
1221	.ifu_exu_addr_mask_d(ifu_exu_addr_mask_d),
1222	.ifu_exu_save_d (ifu_exu_save_d),
1223	.ifu_exu_restore_d (ifu_exu_restore_d),
1224	.ifu_exu_casa_d (ifu_exu_casa_d),
1225	.rml_ecl_clean_window_e(rml_ecl_clean_window_e),
1226	.rml_ecl_fill_e (rml_ecl_fill_e),
1227	.rml_ecl_other_e (rml_ecl_other_e),
1228	.rml_ecl_wtype_e (rml_ecl_wtype_e[2:0]),
1229	.ifu_exu_tcc_e (ifu_exu_tcc_e),
1230	.ifu_exu_useimm_d (ifu_exu_useimm_d),
1231	.ifu_exu_nceen_e (ifu_exu_nceen_e),
1232	.ifu_tlu_flush_m (ifu_tlu_flush_m),
1233	.ifu_exu_ttype_vld_m(ifu_exu_ttype_vld_m),
1234	.tlu_exu_priv_trap_m(tlu_exu_priv_trap_m),
1235	.tlu_exu_pic_onebelow_m(tlu_exu_pic_onebelow_m),
1236	.tlu_exu_pic_twobelow_m(tlu_exu_pic_twobelow_m),
1237	.lsu_exu_flush_pipe_w(lsu_exu_flush_pipe_w),
1238	.ifu_exu_sethi_inst_d(ifu_exu_sethi_inst_d),
1239	.lsu_exu_st_dtlb_perr_g(lsu_exu_st_dtlb_perr_g));
1240
1241	sparc_exu_alu alu(
1242	.byp_alu_rs3_data_e(exu_lsu_rs3_data_e[63:0]),
1243	.so (scan0_2),
1244	.si (scan0_1),
1245	.ifu_lsu_casa_e (ecl_alu_casa_e),
1246	/AUTOINST/
1247	// Outputs
1248	.alu_byp_rd_data_e (alu_byp_rd_data_e[63:0]),
1249	.exu_ifu_brpc_e (exu_ifu_brpc_e[47:0]),
1250	.exu_lsu_ldst_va_e (exu_lsu_ldst_va_e[47:0]),
1251	.exu_lsu_early_va_e(exu_lsu_early_va_e[10:3]),
1252	.exu_mmu_early_va_e(exu_mmu_early_va_e[7:0]),
1253	.alu_ecl_add_n64_e (alu_ecl_add_n64_e),
1254	.alu_ecl_add_n32_e (alu_ecl_add_n32_e),
1255	.alu_ecl_log_n64_e (alu_ecl_log_n64_e),
1256	.alu_ecl_log_n32_e (alu_ecl_log_n32_e),
1257	.alu_ecl_zhigh_e (alu_ecl_zhigh_e),
1258	.alu_ecl_zlow_e (alu_ecl_zlow_e),
1259	.exu_ifu_regz_e (exu_ifu_regz_e),
1260	.exu_ifu_regn_e (exu_ifu_regn_e),
1261	.alu_ecl_adderin2_63_e(alu_ecl_adderin2_63_e),
1262	.alu_ecl_adderin2_31_e(alu_ecl_adderin2_31_e),
1263	.alu_ecl_adder_out_63_e(alu_ecl_adder_out_63_e),
1264	.alu_ecl_cout32_e (alu_ecl_cout32_e),
1265	.alu_ecl_cout64_e_l(alu_ecl_cout64_e_l),
1266	.alu_ecl_mem_addr_invalid_e_l(alu_ecl_mem_addr_invalid_e_l),
1267	// Inputs
1268	.rclk (rclk),
1269	.se (se),
1270	.byp_alu_rs1_data_e(byp_alu_rs1_data_e[63:0]),
1271	.byp_alu_rs2_data_e_l(byp_alu_rs2_data_e_l[63:0]),
1272	.byp_alu_rcc_data_e(byp_alu_rcc_data_e[63:0]),
1273	.ecl_alu_cin_e (ecl_alu_cin_e),
1274	.ifu_exu_invert_d (ifu_exu_invert_d),
1275	.ecl_alu_log_sel_and_e(ecl_alu_log_sel_and_e),
1276	.ecl_alu_log_sel_or_e(ecl_alu_log_sel_or_e),
1277	.ecl_alu_log_sel_xor_e(ecl_alu_log_sel_xor_e),
1278	.ecl_alu_log_sel_move_e(ecl_alu_log_sel_move_e),
1279	.ecl_alu_out_sel_sum_e_l(ecl_alu_out_sel_sum_e_l),
1280	.ecl_alu_out_sel_rs3_e_l(ecl_alu_out_sel_rs3_e_l),
1281	.ecl_alu_out_sel_shift_e_l(ecl_alu_out_sel_shift_e_l),
1282	.ecl_alu_out_sel_logic_e_l(ecl_alu_out_sel_logic_e_l),
1283	.shft_alu_shift_out_e(shft_alu_shift_out_e[63:0]),
1284	.ecl_alu_sethi_inst_e(ecl_alu_sethi_inst_e));
1285	sparc_exu_shft shft(/AUTOINST/
1286	// Outputs
1287	.shft_alu_shift_out_e(shft_alu_shift_out_e[63:0]),
1288	// Inputs
1289	.ecl_shft_lshift_e_l(ecl_shft_lshift_e_l),
1290	.ecl_shft_op32_e (ecl_shft_op32_e),
1291	.ecl_shft_shift4_e(ecl_shft_shift4_e[3:0]),
1292	.ecl_shft_shift1_e(ecl_shft_shift1_e[3:0]),
1293	.byp_alu_rs1_data_e(byp_alu_rs1_data_e[63:0]),
1294	.byp_alu_rs2_data_e(byp_alu_rs2_data_e[5:4]),
1295	.ecl_shft_enshift_e_l(ecl_shft_enshift_e_l),
1296	.ecl_shft_extendbit_e(ecl_shft_extendbit_e),
1297	.ecl_shft_extend32bit_e_l(ecl_shft_extend32bit_e_l));
1298
1299	sparc_exu_div div(
1300	.so (scan0_3),
1301	.si (scan0_2),
1302	.byp_div_rs1_data_e(byp_alu_rs1_data_e[63:0]),
1303	.byp_div_rs2_data_e(byp_alu_rs2_data_e[63:0]),
1304	.byp_div_yreg_data_w(byp_irf_rd_data_w[31:0]),
1305	/AUTOINST/
1306	// Outputs
1307	.div_ecl_xin_msb_l (div_ecl_xin_msb_l),
1308	.div_ecl_x_msb (div_ecl_x_msb),
1309	.div_ecl_d_msb (div_ecl_d_msb),
1310	.div_ecl_cout64 (div_ecl_cout64),
1311	.div_ecl_cout32 (div_ecl_cout32),
1312	.div_ecl_gencc_in_msb_l(div_ecl_gencc_in_msb_l),
1313	.div_ecl_gencc_in_31(div_ecl_gencc_in_31),
1314	.div_ecl_upper32_equal(div_ecl_upper32_equal),
1315	.div_ecl_low32_nonzero(div_ecl_low32_nonzero),
1316	.div_ecl_dividend_msb(div_ecl_dividend_msb),
1317	.div_byp_muldivout_g(div_byp_muldivout_g[63:0]),
1318	.div_byp_yreg_e (div_byp_yreg_e[31:0]),
1319	.div_ecl_yreg_0_l (div_ecl_yreg_0_l[3:0]),
1320	.exu_mul_rs1_data (exu_mul_rs1_data[63:0]),
1321	.exu_mul_rs2_data (exu_mul_rs2_data[63:0]),
1322	.div_ecl_adder_out_31(div_ecl_adder_out_31),
1323	.div_ecl_detect_zero_low(div_ecl_detect_zero_low),
1324	.div_ecl_detect_zero_high(div_ecl_detect_zero_high),
1325	.div_ecl_d_62 (div_ecl_d_62),
1326	// Inputs
1327	.ecl_div_thr_e (ecl_div_thr_e[3:0]),
1328	.ecl_div_yreg_data_31_g(ecl_div_yreg_data_31_g),
1329	.ecl_div_yreg_shift_g(ecl_div_yreg_shift_g[3:0]),
1330	.ecl_div_yreg_wen_g(ecl_div_yreg_wen_g[3:0]),
1331	.ecl_div_yreg_wen_l(ecl_div_yreg_wen_l[3:0]),
1332	.ecl_div_yreg_wen_w(ecl_div_yreg_wen_w[3:0]),
1333	.rclk (rclk),
1334	.se (se),
1335	.ecl_div_keep_d (ecl_div_keep_d),
1336	.ecl_div_ld_inputs (ecl_div_ld_inputs),
1337	.ecl_div_sel_adder (ecl_div_sel_adder),
1338	.ecl_div_last_cycle(ecl_div_last_cycle),
1339	.ecl_div_almostlast_cycle(ecl_div_almostlast_cycle),
1340	.ecl_div_div64 (ecl_div_div64),
1341	.ecl_div_sel_u32 (ecl_div_sel_u32),
1342	.ecl_div_sel_pos32 (ecl_div_sel_pos32),
1343	.ecl_div_sel_neg32 (ecl_div_sel_neg32),
1344	.ecl_div_sel_64b (ecl_div_sel_64b),
1345	.ecl_div_upper32_zero(ecl_div_upper32_zero),
1346	.ecl_div_upper33_one(ecl_div_upper33_one),
1347	.ecl_div_upper33_zero(ecl_div_upper33_zero),
1348	.mul_exu_data_g (mul_exu_data_g[63:0]),
1349	.ecl_div_sel_div (ecl_div_sel_div),
1350	.ecl_div_mul_wen (ecl_div_mul_wen),
1351	.ecl_div_dividend_sign(ecl_div_dividend_sign),
1352	.ecl_div_subtract_l(ecl_div_subtract_l),
1353	.ecl_div_cin (ecl_div_cin),
1354	.ecl_div_newq (ecl_div_newq),
1355	.ecl_div_xinmask (ecl_div_xinmask),
1356	.ecl_div_keepx (ecl_div_keepx),
1357	.ecl_div_mul_get_new_data(ecl_div_mul_get_new_data),
1358	.ecl_div_mul_keep_data(ecl_div_mul_keep_data),
1359	.ecl_div_mul_get_32bit_data(ecl_div_mul_get_32bit_data),
1360	.ecl_div_mul_sext_rs2_e(ecl_div_mul_sext_rs2_e),
1361	.ecl_div_mul_sext_rs1_e(ecl_div_mul_sext_rs1_e),
1362	.ecl_div_muls_rs1_31_e_l(ecl_div_muls_rs1_31_e_l),
1363	.ecl_div_muls (ecl_div_muls),
1364	.ecl_div_zero_rs2_e(ecl_div_zero_rs2_e));
1365
1366	sparc_exu_rml rml(
1367	.current_cwp(current_cwp),
1368	.so (so0),
1369	.si (scan0_3),
1370	.rst_tri_en (mux_drive_disable),
1371	.exu_tlu_wsr_data_w(byp_irf_rd_data_w[5:0]),
1372	.rml_irf_old_e_cwp_e(rml_irf_old_e_cwp_e[1:0]),
1373	.rml_irf_new_e_cwp_e(rml_irf_new_e_cwp_e[1:0]),
1374	/AUTOINST/
1375	// Outputs
1376	.exu_tlu_cwp0_w (exu_tlu_cwp0_w[2:0]),
1377	.exu_tlu_cwp1_w (exu_tlu_cwp1_w[2:0]),
1378	.exu_tlu_cwp2_w (exu_tlu_cwp2_w[2:0]),
1379	.exu_tlu_cwp3_w (exu_tlu_cwp3_w[2:0]),
1380	.exu_tlu_cwp_retry (exu_tlu_cwp_retry),
1381	.exu_tlu_spill_other(exu_tlu_spill_other),
1382	.exu_tlu_spill_wtype(exu_tlu_spill_wtype[2:0]),
1383	.exu_tlu_cwp_cmplt (exu_tlu_cwp_cmplt),
1384	.exu_tlu_cwp_cmplt_tid(exu_tlu_cwp_cmplt_tid[1:0]),
1385	.rml_ecl_cwp_d (rml_ecl_cwp_d[2:0]),
1386	.rml_ecl_cansave_d (rml_ecl_cansave_d[2:0]),
1387	.rml_ecl_canrestore_d(rml_ecl_canrestore_d[2:0]),
1388	.rml_ecl_otherwin_d(rml_ecl_otherwin_d[2:0]),
1389	.rml_ecl_wstate_d (rml_ecl_wstate_d[5:0]),
1390	.rml_ecl_cleanwin_d(rml_ecl_cleanwin_d[2:0]),
1391	.rml_ecl_fill_e (rml_ecl_fill_e),
1392	.rml_ecl_clean_window_e(rml_ecl_clean_window_e),
1393	.rml_ecl_other_e (rml_ecl_other_e),
1394	.rml_ecl_wtype_e (rml_ecl_wtype_e[2:0]),
1395	.exu_ifu_spill_e (exu_ifu_spill_e),
1396	.rml_ecl_gl_e (rml_ecl_gl_e[1:0]),
1397	.rml_irf_old_lo_cwp_e(rml_irf_old_lo_cwp_e[2:0]),
1398	.rml_irf_new_lo_cwp_e(rml_irf_new_lo_cwp_e[2:0]),
1399	.rml_irf_swap_even_e(rml_irf_swap_even_e),
1400	.rml_irf_swap_odd_e(rml_irf_swap_odd_e),
1401	.rml_irf_swap_local_e(rml_irf_swap_local_e),
1402	.rml_irf_kill_restore_w(rml_irf_kill_restore_w),
1403	.rml_irf_cwpswap_tid_e(rml_irf_cwpswap_tid_e[1:0]),
1404	.rml_ecl_swap_done (rml_ecl_swap_done[3:0]),
1405	.rml_ecl_rmlop_done_e(rml_ecl_rmlop_done_e),
1406	.exu_ifu_oddwin_s (exu_ifu_oddwin_s[3:0]),
1407	.exu_tlu_spill (exu_tlu_spill),
1408	.exu_tlu_spill_tid (exu_tlu_spill_tid[1:0]),
1409	.rml_ecl_kill_m (rml_ecl_kill_m),
1410	.rml_irf_old_agp (rml_irf_old_agp[1:0]),
1411	.rml_irf_new_agp (rml_irf_new_agp[1:0]),
1412	.rml_irf_swap_global(rml_irf_swap_global),
1413	.rml_irf_global_tid(rml_irf_global_tid[1:0]),
1414	// Inputs
1415	.rclk (rclk),
1416	.se (se),
1417	.grst_l (grst_l),
1418	.arst_l (arst_l),
1419	.ifu_exu_tid_s2 (ifu_exu_tid_s2[1:0]),
1420	.ifu_exu_save_d (ifu_exu_save_d),
1421	.ifu_exu_restore_d (ifu_exu_restore_d),
1422	.ifu_exu_saved_e (ifu_exu_saved_e),
1423	.ifu_exu_restored_e(ifu_exu_restored_e),
1424	.ifu_exu_flushw_e (ifu_exu_flushw_e),
1425	.ecl_rml_thr_m (ecl_rml_thr_m[3:0]),
1426	.ecl_rml_thr_w (ecl_rml_thr_w[3:0]),
1427	.ecl_rml_cwp_wen_e (ecl_rml_cwp_wen_e),
1428	.ecl_rml_cansave_wen_w(ecl_rml_cansave_wen_w),
1429	.ecl_rml_canrestore_wen_w(ecl_rml_canrestore_wen_w),
1430	.ecl_rml_otherwin_wen_w(ecl_rml_otherwin_wen_w),
1431	.ecl_rml_wstate_wen_w(ecl_rml_wstate_wen_w),
1432	.ecl_rml_cleanwin_wen_w(ecl_rml_cleanwin_wen_w),
1433	.ecl_rml_xor_data_e(ecl_rml_xor_data_e[2:0]),
1434	.ecl_rml_kill_e (ecl_rml_kill_e),
1435	.ecl_rml_kill_w (ecl_rml_kill_w),
1436	.ecl_rml_early_flush_w(ecl_rml_early_flush_w),
1437	.tlu_exu_agp (tlu_exu_agp[1:0]),
1438	.tlu_exu_agp_swap (tlu_exu_agp_swap),
1439	.tlu_exu_agp_tid (tlu_exu_agp_tid[1:0]),
1440	.tlu_exu_cwp_m (tlu_exu_cwp_m[2:0]),
1441	.tlu_exu_cwpccr_update_m(tlu_exu_cwpccr_update_m),
1442	.ecl_rml_inst_vld_w(ecl_rml_inst_vld_w),
1443	.tlu_exu_cwp_retry_m(tlu_exu_cwp_retry_m));
1444	endmodule // sparc_exu
1445	// Local Variables:
1446	// verilog-library-directories:("." "../../../srams/rtl")
1447	// End:

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source: XOpenSparcT1/trunk/T1-CPU/exu/sparc_exu.v @ 26

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