source: XOpenSparcT1/trunk/T1-common/common/test_stub_scan.v @ 6

Revision 6, 5.2 KB checked in by pntsvt00, 13 years ago (diff)

versione iniziale opensparc

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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T1 Processor File: test_stub_scan.v
4// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
5// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
6//
7// The above named program is free software; you can redistribute it and/or
8// modify it under the terms of the GNU General Public
9// License version 2 as published by the Free Software Foundation.
10//
11// The above named program is distributed in the hope that it will be
12// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
13// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14// General Public License for more details.
15//
16// You should have received a copy of the GNU General Public
17// License along with this work; if not, write to the Free Software
18// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
19//
20// ========== Copyright Header End ============================================
21// ____________________________________________________________________________
22//
23//  test_stub_bist - Test Stub with Scan Support
24// ____________________________________________________________________________
25//
26// Description: DBB interface for test signal generation
27// ____________________________________________________________________________
28
29module test_stub_scan (/*AUTOARG*/
30// Outputs
31mux_drive_disable, mem_write_disable, sehold, se, testmode_l, 
32mem_bypass, so_0, so_1, so_2, 
33// Inputs
34ctu_tst_pre_grst_l, arst_l, global_shift_enable, 
35ctu_tst_scan_disable, ctu_tst_scanmode, ctu_tst_macrotest, 
36ctu_tst_short_chain, long_chain_so_0, short_chain_so_0, 
37long_chain_so_1, short_chain_so_1, long_chain_so_2, short_chain_so_2
38);
39
40   input        ctu_tst_pre_grst_l;
41   input        arst_l;                // no longer used
42   input        global_shift_enable;
43   input        ctu_tst_scan_disable;  // redefined as pin_based_scan
44   input        ctu_tst_scanmode;
45   input        ctu_tst_macrotest;
46   input        ctu_tst_short_chain;
47   input        long_chain_so_0;
48   input        short_chain_so_0;
49   input        long_chain_so_1;
50   input        short_chain_so_1;
51   input        long_chain_so_2;
52   input        short_chain_so_2;
53   
54   output       mux_drive_disable;
55   output       mem_write_disable;
56   output       sehold;
57   output       se;
58   output       testmode_l;
59   output       mem_bypass;
60   output       so_0;
61   output       so_1;
62   output       so_2;
63
64   wire         pin_based_scan;
65   wire         short_chain_en;
66   wire         short_chain_select;
67
68   // INTERNAL CLUSTER CONNECTIONS
69   //
70   // Scan Chain Hookup
71   // =================
72   //
73   // Scan chains have two configurations: long and short.
74   // The short chain is typically the first tenth of the
75   // long chain. The short chain should contain memory
76   // collar flops for deep arrays. The CTU determines
77   // which configuration is selected. Up to three chains
78   // are supported.
79   //
80   // The scanout connections from the long and short
81   // chains connect to the following inputs:
82   //
83   // long_chain_so_0, short_chain_so_0 (mandatory)
84   // long_chain_so_1, short_chain_so_1 (optional)
85   // long_chain_so_2, short_chain_so_2 (optional)
86   //
87   // The test stub outputs should connect directly to the
88   // scanout port(s) of the cluster:
89   //
90   // so_0 (mandatory), so_1 (optional), so_2 (optional)
91   //
92   //
93   // Static Output Signals
94   // =====================
95   //
96   // testmode_l
97   //
98   // Local testmode control for overriding gated
99   // clocks, asynchronous resets, etc. Asserted
100   // for all shift-based test modes.
101   //
102   // mem_bypass
103   //
104   // Memory bypass control for arrays without output
105   // flops. Allows testing of shadow logic. Asserted
106   // for scan test; de-asserted for macrotest.
107   //
108   //
109   // Dynamic Output Signals
110   // ======================
111   //
112   // sehold
113   //
114   // The sehold signal needs to be set for macrotest
115   // to allow holding flops in the array collars
116   // to retain their shifted data during capture.
117   // Inverted version of scan enable during macrotest.
118   //
119   // mux_drive_disable (for mux/long chain protection)
120   //
121   // Activate one-hot mux protection circuitry during
122   // scan shift and reset. Formerly known as rst_tri_en.
123   // Also used by long chain memories with embedded
124   // control.
125   //
126   // mem_write_disable (for short chain protection)
127   //
128   // Protects contents of short chain memories during
129   // shift and POR.
130   //
131   // se
132
133   assign  mux_drive_disable  = ~ctu_tst_pre_grst_l | short_chain_select | se;
134   assign  mem_write_disable  = ~ctu_tst_pre_grst_l | se;
135   assign  sehold             = ctu_tst_macrotest & ~se;
136   assign  se                 = global_shift_enable;
137   assign  testmode_l         = ~ctu_tst_scanmode;
138   assign  mem_bypass         = ~ctu_tst_macrotest & ~testmode_l;
139   assign  pin_based_scan     = ctu_tst_scan_disable;
140   assign  short_chain_en     = ~(pin_based_scan & se);
141   assign  short_chain_select = ctu_tst_short_chain & ~testmode_l & short_chain_en;
142   assign  so_0               = short_chain_select ? short_chain_so_0 : long_chain_so_0;
143   assign  so_1               = short_chain_select ? short_chain_so_1 : long_chain_so_1;
144   assign  so_2               = short_chain_select ? short_chain_so_2 : long_chain_so_2;
145   
146endmodule // test_stub_scan
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