| Revision 29,
521 bytes
checked in by pntsvt00, 14 years ago
(diff) |
|
added coregen files to recreate ngc from xco
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| Rev | Line | |
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| [29] | 1 | # Date: Tue Apr 5 16:26:02 2011 |
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| 2 | |
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| 3 | SET addpads = false |
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| 4 | SET asysymbol = false |
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| 5 | SET busformat = BusFormatAngleBracketNotRipped |
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| 6 | SET createndf = false |
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| 7 | SET designentry = Verilog |
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| 8 | SET device = xc5vlx110t |
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| 9 | SET devicefamily = virtex5 |
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| 10 | SET flowvendor = Other |
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| 11 | SET formalverification = False |
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| 12 | SET foundationsym = False |
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| 13 | SET implementationfiletype = Ngc |
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| 14 | SET package = ff1136 |
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| 15 | SET removerpms = False |
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| 16 | SET simulationfiles = Behavioral |
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| 17 | SET speedgrade = -2 |
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| 18 | SET verilogsim = true |
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| 19 | SET vhdlsim = false |
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| 20 | SET workingdirectory = ./tmp/ |
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| 21 | |
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| 22 | # CRC: e8561b33 |
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