Changeset 17 in XOpenSparcT1 for trunk/WB2ALTDDR3
- Timestamp:
- 03/25/11 12:19:25 (14 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
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trunk/WB2ALTDDR3/dram_wb.v
r10 r17 47 47 //output ddr3_reset, 48 48 output [12:0] ddr3_a, 49 output [ 2:0] ddr3_ba,49 output [ 1:0] ddr3_ba, 50 50 output ddr3_ras_n, 51 51 output ddr3_cas_n, … … 64 64 ); 65 65 66 wire [ 255:0] rd_data_fifo_out;66 wire [127:0] rd_data_fifo_out; 67 67 reg [ 23:0] rd_addr_cache; 68 wire [ 71:0] wr_dout;68 wire [127:0] wr_dout; 69 69 wire [ 31:0] cmd_out; 70 70 reg wb_stb_i_d; 71 reg [ 31:0] mask_data;71 reg [ 15:0] mask_data; 72 72 73 73 wire dram_ready; … … 83 83 .phy_init_done(phy_init_done), 84 84 .app_wdf_mask_data(mask_data), 85 .app_af_addr(cmd_out[ 25:2]),85 .app_af_addr(cmd_out[31:1]), 86 86 .rd_data_valid(rd_data_valid), 87 87 .rd_data_fifo_out(rd_data_fifo_out), 88 .app_wdf_data(wr_dout[ 63:0]),88 .app_wdf_data(wr_dout[127:0]), 89 89 90 90 // in dubbio … … 96 96 .clk0_tb(), 97 97 .idly_clk_200(clk200), 98 //.rst0_tb(ddr3_reset),98 .rst0_tb(ddr3_reset), 99 99 100 100 .ddr2_dqs(ddr3_dqs), … … 110 110 .ddr2_we_n(ddr3_we_n), 111 111 .ddr2_ba(ddr3_ba), 112 112 .ddr2_a(ddr3_a), 113 113 .ddr2_dm(ddr3_dm) 114 114 // | … … 178 178 ); 179 179 */ 180 180 181 assign ddr_rst=!phy_init_done; 181 182 … … 299 300 reg rd_data_valid_stb_d3; 300 301 reg rd_data_valid_stb_d4; 301 reg [ 255:0] rd_data_fifo_out_d;302 reg [127:0] rd_data_fifo_out_d; 302 303 reg wb_ack_d; 303 304
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