- Timestamp:
- 04/11/11 09:54:25 (14 years ago)
- Location:
- trunk
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/os2wb/os2wb.v
r33 r36 438 438 if(pcx_packet_d[122:118]==5'b10000 && !pcx_req_d[4]) 439 439 begin 440 $display("INFO: OS2WB: ifill");440 $display("INFO: OS2WB: DRAM ifill"); 441 441 wb_addr<={pcx_req_d,19'b0,pcx_packet_d[103:64+5],5'b00000}; //DRAM ifill 442 442 end 443 443 else 444 444 if(pcx_packet_d[64+39:64+28]==12'hFFF && pcx_packet_d[64+27:64+24]!=4'b0) // flash remap FFF1->FFF8 445 wb_addr<={pcx_req_d,19'b0,pcx_packet_d[103:64+3]+37'h0000E00000,3'b000}; 446 else 445 begin 446 $display("INFO: OS2WB: flash remap"); 447 wb_addr<={pcx_req_d,19'b0,pcx_packet_d[103:64+3]+37'h0000E00000,3'b000}; 448 end 449 else 447 450 wb_addr<={pcx_req_d,19'b0,pcx_packet_d[103:64+3],3'b000}; 448 451 wb_data_o<=pcx_packet_d[63:0]; … … 689 692 if(wb_ack) 690 693 begin 691 $display("INFO: OS2WB: PCX_REQ_STEP1_1 wb_addr = %x wb_data_i = %x wb_data_o = ",wb_addr, wb_data_i,wb_data_o);694 $display("INFO: OS2WB: PCX_REQ_STEP1_1 wb_addr = %x wb_data_i = %x wb_data_o = %x ",wb_addr, wb_data_i,wb_data_o); 692 695 cpx_packet_1[144]<=1; // Valid 693 696 cpx_packet_1[139]<=(pcx_packet_d[122:118]==5'b00000) || (pcx_packet_d[122:118]==5'b10000) ? 1:0; // L2 always miss on load and ifill -
trunk/sw/boot.S
r35 r36 33 33 mov %g0, %o5 34 34 35 35 !wrpr %g0, 0, %gl 36 36 !wrpr %g0, 0, %tl 37 37 -
trunk/sw/linker.lds
r33 r36 6 6 7 7 SECTIONS { 8 .boot 0x 0000000000000020: { *(.boot);}8 .boot 0xf0000020: { *(.boot);} 9 9 .text : { *(.text) } 10 10 .data : { *(.data) } -
trunk/sw/uart.c
r34 r36 1 1 #include "uart.h" 2 2 3 const long UART_BASE_ADR[1] = {0x800000FFF0C2C000}; 4 const int UART_BAUDS[1] = {0}; 3 #define BASE_UART 0x800000FFF0C2C000 4 #define BAUD_UART 100000 5 //const long UART_BASE_ADR[1] = {0x800000FFF0C2C000}; 6 //const int UART_BAUDS[1] = {0}; 5 7 const int BAUD_RATE =100000; 6 8 const int IN_CLK =50000000; … … 12 14 #define WAIT_FOR_XMITR(core) \ 13 15 do { \ 14 lsr = REG8( UART_BASE_ADR[core]+ UART_LSR); \16 lsr = REG8(BASE_UART + UART_LSR); \ 15 17 } while ((lsr & BOTH_EMPTY) != BOTH_EMPTY) 16 18 17 19 #define WAIT_FOR_THRE(core) \ 18 20 do { \ 19 lsr = REG8( UART_BASE_ADR[core]+ UART_LSR); \21 lsr = REG8(BASE_UART + UART_LSR); \ 20 22 } while ((lsr & UART_LSR_THRE) != UART_LSR_THRE) 21 23 22 #define CHECK_FOR_CHAR(core) (REG8( UART_BASE_ADR[core]+ UART_LSR) & UART_LSR_DR)24 #define CHECK_FOR_CHAR(core) (REG8(BASE_UART + UART_LSR) & UART_LSR_DR) 23 25 24 26 #define WAIT_FOR_CHAR(core) \ 25 27 do { \ 26 lsr = REG8( UART_BASE_ADR[core]+ UART_LSR); \28 lsr = REG8(BASE_UART + UART_LSR); \ 27 29 } while ((lsr & UART_LSR_DR) != UART_LSR_DR) 28 30 … … 50 52 */ 51 53 uart_init(0); 54 52 55 for(;;) { 53 56 uart_puts(0,"XOpenSparc is alive \n"); … … 62 65 //float float_divisor; 63 66 /* Reset receiver and transmiter */ 64 REG8( UART_FCR ) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14; 65 //asm("clr %sp \n"); 67 asm("nop \n"); 68 asm("nop \n"); 69 asm("nop \n"); 70 asm("nop \n"); 71 REG8( BASE_UART + UART_FCR ) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14; 72 //REG8( UART_BASE_ADR[core] + UART_FCR ) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_14; 73 asm("nop \n"); 74 asm("nop \n"); 75 asm("nop \n"); 76 asm("nop \n"); 77 asm("nop \n"); 66 78 //asm("sethi %hi(8), %sp \n"); 67 79 //asm("mov 0xfff, %sp \n"); 68 80 69 81 /* Disable all interrupts */ 70 REG8(UART_BASE_ADR[core] + UART_IER) = 0x00; 82 REG8(BASE_UART + UART_IER) = 0x00; 83 //REG8(UART_BASE_ADR[core] + UART_IER) = 0x00; 71 84 72 85 /* Set 8 bit char, 1 stop bit, no parity */ 73 REG8( UART_BASE_ADR[core]+ UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY);86 REG8(BASE_UART + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY); 74 87 75 88 /* Set baud rate */ … … 79 92 divisor = BAUD_RATE; 80 93 81 REG8( UART_BASE_ADR[core]+ UART_LCR) |= UART_LCR_DLAB;82 REG8( UART_BASE_ADR[core]+ UART_DLL) = divisor & 0x000000ff;83 REG8( UART_BASE_ADR[core]+ UART_DLM) = (divisor >> 8) & 0x000000ff;84 REG8( UART_BASE_ADR[core]+ UART_LCR) &= ~(UART_LCR_DLAB);94 REG8(BASE_UART + UART_LCR) |= UART_LCR_DLAB; 95 REG8(BASE_UART + UART_DLL) = divisor & 0x000000ff; 96 REG8(BASE_UART + UART_DLM) = (divisor >> 8) & 0x000000ff; 97 REG8(BASE_UART + UART_LCR) &= ~(UART_LCR_DLAB); 85 98 86 99 return; … … 92 105 93 106 WAIT_FOR_THRE(core); 94 REG8( UART_BASE_ADR[core]+ UART_TX) = c;107 REG8(BASE_UART + UART_TX) = c; 95 108 if(c == '\n') { 96 109 WAIT_FOR_THRE(core); 97 REG8( UART_BASE_ADR[core]+ UART_TX) = '\r';110 REG8(BASE_UART + UART_TX) = '\r'; 98 111 } 99 112 WAIT_FOR_XMITR(core); -
trunk/tools/compila
r33 r36 10 10 11 11 #assembla il boot.S 12 /opt/sparc64-sun-solaris2.8-toolchain/bin/sparc-sun-solaris2.8-as -64 boot.S -o boot.o 12 echo "create boot.o" 13 /opt/sparc64-sun-solaris2.8-toolchain/bin/sparc-sun-solaris2.8-as -xarch=v9 -64 boot.S -o boot.o 13 14 14 15 ## compila con ISA SPARC-V9 16 echo "compile $1.c" 15 17 /opt/sparc64-sun-solaris2.8-toolchain/bin/sparc64-sun-solaris2.8-gcc -m64 -ffreestanding -nostdinc -Os -c $1.c 16 18 17 19 ## linka con ISA SPARC-V9 a 64 bits 18 20 echo "create $1.bin" 19 /opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/ld -melf64_sparc --script linker.lds boot.o $1.o -o $1.bin 21 #/opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/ld -melf64_sparc --script linker.lds boot.o $1.o -o $1.bin 22 23 ### da codice S1 24 /opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/ld -melf64_sparc --script=linker.map -EB -o $1.bin boot.o $1.o 20 25 21 26 22 27 ## fa il dump del file 23 /opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/objdump - d$1.bin >$1.dump28 /opt/sparc64-sun-solaris2.8-toolchain/sparc64-sun-solaris2.8/bin/objdump -zD $1.bin >$1.dump 24 29 25 30 ### crea memory.hex -
trunk/tools/dump2hex.php
r30 r36 31 31 while (!feof($fp)) { 32 32 $line = fgets($fp); 33 $opcode1 = substr($line, 6, 2);34 $opcode2 = substr($line, 9, 2);35 $opcode3 = substr($line, 12, 2);36 $opcode4 = substr($line, 15, 2);33 $opcode1 = substr($line, 14, 2); 34 $opcode2 = substr($line, 17, 2); 35 $opcode3 = substr($line, 20, 2); 36 $opcode4 = substr($line, 23, 2); 37 37 $caratteri = strlen($opcode1); 38 38 if($caratteri != 0){ … … 44 44 } 45 45 else{ 46 for($i=0; $i<1; $i++) fgets($fp); 46 echo "//".$line; 47 $line = fgets($fp); 48 echo "//".$line; 47 49 } 48 50 }
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