Changeset 10 in XOpenSparcT1 for trunk/WB2ALTDDR3/dram_wb.v
- Timestamp:
- 03/22/11 20:08:58 (14 years ago)
- File:
-
- 1 edited
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trunk/WB2ALTDDR3/dram_wb.v
r6 r10 45 45 inout ddr3_ck, 46 46 inout ddr3_ck_n, 47 output ddr3_reset,47 //output ddr3_reset, 48 48 output [12:0] ddr3_a, 49 49 output [ 2:0] ddr3_ba, … … 96 96 .clk0_tb(), 97 97 .idly_clk_200(clk200), 98 99 .rst0_tb(ddr3_reset),98 //.rst0_tb(ddr3_reset), 99 100 100 .ddr2_dqs(ddr3_dqs), 101 101 .ddr2_dqs_n(ddr3_dqs_n),
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