Changeset 10 in XOpenSparcT1


Ignore:
Timestamp:
03/22/11 20:08:58 (14 years ago)
Author:
pntsvt00
Message:

versione sintetizzabile

Files:
36 added
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/Top/W1.v

    r8 r10  
    3131   inout         ddr3_ck, 
    3232   inout         ddr3_ck_n, 
    33    output        ddr3_reset, 
     33   //output        ddr3_reset, 
    3434   output [12:0] ddr3_a, 
    3535   output [ 2:0] ddr3_ba, 
    … …  
    410410    .ddr3_ck(ddr3_ck),  
    411411    .ddr3_ck_n(ddr3_ck_n),  
    412     .ddr3_reset(ddr3_reset), 
     412    //.ddr3_reset(ddr3_reset), 
    413413    .ddr3_a(ddr3_a),  
    414414    .ddr3_ba(ddr3_ba),  

  • trunk/WB2ALTDDR3/dram_wb.v

    r6 r10  
    4545   inout             ddr3_ck, 
    4646   inout             ddr3_ck_n, 
    47    output            ddr3_reset, 
     47   //output            ddr3_reset, 
    4848   output     [12:0] ddr3_a, 
    4949   output     [ 2:0] ddr3_ba, 
    … …  
    9696         .clk0_tb(), 
    9797         .idly_clk_200(clk200), 
    98           
    99     .rst0_tb(ddr3_reset), 
     98         //.rst0_tb(ddr3_reset), 
     99     
    100100    .ddr2_dqs(ddr3_dqs), 
    101101    .ddr2_dqs_n(ddr3_dqs_n), 

  • trunk/Xilinx/pll.v

    r6 r10  
    4444   assign GND_BUS_16 = 16'b0000000000000000; 
    4545   assign VCC_BIT = 1; 
    46    IBUFG  CLKIN1_IBUFG_INST (.I(CLKIN1_IN),  
     46   BUFG  CLKIN1_IBUFG_INST (.I(CLKIN1_IN),  
    4747                            .O(CLKIN1_IBUFG)); 
    4848   BUFG  CLKOUT0_BUFG_INST (.I(CLKOUT0_BUF),  

  • trunk/os2wb/os2wb.v

    r6 r10  
    154154   end 
    155155         
    156 pcx_fifo pcx_fifo_inst(  
     156/*pcx_fifo pcx_fifo_inst(  
    157157       // FIFO should be first word fall-through 
    158158       // It has no full flag as the core will send only limited number of requests, 
    … …  
    171171    .q(pcx_data_fifo) 
    172172); 
     173*/ 
     174pcx_fifo pcx_fifo_inst(  
     175    .clk(clk), 
     176         .rst(!rstn), 
     177    .din({pcx_atom_1,pcx_req_1,pcx_data}), 
     178    .rd_en(fifo_rd), 
     179    .wr_en((pcx_req_1!=5'b00000 && pcx_data[123]) || (pcx_atom_2 && pcx_data_123_d)),  
     180    .empty(pcx_fifo_empty), 
     181    .dout(pcx_data_fifo) 
     182); 
     183         
     184 
     185 
    173186// -------------------------- 
    174187 

  • trunk/os2wb/s1_top.v

    r6 r10  
    180180 
    181181  ); 
    182  
     182/* 
    183183  sparc sparc_1 ( 
    184184 
    … …  
    230230 
    231231  ); 
    232  
     232*/ 
    233233  /* 
    234234   * SPARC Core to Wishbone Master bridge 
    … …  
    240240wire [144:0] fp_cpx; 
    241241 
    242 os2wb_dual os2wb_inst ( 
     242//os2wb_dual os2wb_inst ( 
     243os2wb os2wb_inst ( 
    243244    .clk(sys_clock_i),  
    244245    .rstn(~sys_reset_final),  
    … …  
    251252    .cpx_packet(cpx_spc_data_cx2),  
    252253          
    253     .pcx1_req(spc1_pcx_req_pq),  
    254     .pcx1_atom(spc1_pcx_atom_pq),  
    255     .pcx1_data(spc1_pcx_data_pa),  
    256     .pcx1_grant(pcx1_spc_grant_px),  
    257     .cpx1_ready(cpx1_spc_data_rdy_cx2),  
    258     .cpx1_packet(cpx1_spc_data_cx2),  
     254    //.pcx1_req(spc1_pcx_req_pq),  
     255    //.pcx1_atom(spc1_pcx_atom_pq),  
     256    //.pcx1_data(spc1_pcx_data_pa),  
     257    //.pcx1_grant(pcx1_spc_grant_px),  
     258    //.cpx1_ready(cpx1_spc_data_rdy_cx2),  
     259    //.cpx1_packet(cpx1_spc_data_cx2),  
    259260 
    260261    .wb_data_i(wbm_data_i),  

  • trunk/synplicity/proj_1.prj

    r8 r10  
    44 
    55#project files 
    6 add_file -verilog "../trunk/T1-common/include/xst_defines.h" 
    7 add_file -verilog "../trunk/Top/W1.v" 
    8 add_file -verilog "../trunk/OC-UART/raminfr.v" 
    9 add_file -verilog "../trunk/OC-UART/timescale.v" 
    10 add_file -verilog "../trunk/OC-UART/uart_debug_if.v" 
    11 add_file -verilog "../trunk/OC-UART/uart_defines.v" 
    12 add_file -verilog "../trunk/OC-UART/uart_receiver.v" 
    13 add_file -verilog "../trunk/OC-UART/uart_regs.v" 
    14 add_file -verilog "../trunk/OC-UART/uart_rfifo.v" 
    15 add_file -verilog "../trunk/OC-UART/uart_sync_flops.v" 
    16 add_file -verilog "../trunk/OC-UART/uart_tfifo.v" 
    17 add_file -verilog "../trunk/OC-UART/uart_top.v" 
    18 add_file -verilog "../trunk/OC-UART/uart_transmitter.v" 
    19 add_file -verilog "../trunk/OC-UART/uart_wb.v" 
    20 add_file -verilog "../trunk/NOR-flash/WBFLASH.v" 
    21 add_file -verilog "../trunk/os2wb/l1ddir.v" 
    22 add_file -verilog "../trunk/os2wb/l1dir.v" 
    23 add_file -verilog "../trunk/os2wb/l1idir.v" 
    24 add_file -verilog "../trunk/os2wb/os2wb.v" 
    25 add_file -verilog "../trunk/os2wb/os2wb_dual.v" 
    26 add_file -verilog "../trunk/os2wb/rst_ctrl.v" 
    27 add_file -verilog "../trunk/os2wb/s1_top.v" 
    28 add_file -verilog "../trunk/T1-common/common/cluster_header.v" 
    29 add_file -verilog "../trunk/T1-common/common/cluster_header_ctu.v" 
    30 add_file -verilog "../trunk/T1-common/common/cluster_header_dup.v" 
    31 add_file -verilog "../trunk/T1-common/common/cluster_header_sync.v" 
    32 add_file -verilog "../trunk/T1-common/common/cmp_sram_redhdr.v" 
    33 add_file -verilog "../trunk/T1-common/common/dbl_buf.v" 
    34 add_file -verilog "../trunk/T1-common/common/swrvr_clib.v" 
    35 add_file -verilog "../trunk/T1-common/common/swrvr_dlib.v" 
    36 add_file -verilog "../trunk/T1-common/common/sync_pulse_synchronizer.v" 
    37 add_file -verilog "../trunk/T1-common/common/synchronizer_asr.v" 
    38 add_file -verilog "../trunk/T1-common/common/synchronizer_asr_dup.v" 
    39 add_file -verilog "../trunk/T1-common/common/test_stub_bist.v" 
    40 add_file -verilog "../trunk/T1-common/common/test_stub_scan.v" 
    41 add_file -verilog "../trunk/T1-common/common/ucb_bus_in.v" 
    42 add_file -verilog "../trunk/T1-common/common/ucb_bus_out.v" 
    43 add_file -verilog "../trunk/T1-common/common/ucb_flow_2buf.v" 
    44 add_file -verilog "../trunk/T1-common/common/ucb_flow_jbi.v" 
    45 add_file -verilog "../trunk/T1-common/common/ucb_flow_spi.v" 
    46 add_file -verilog "../trunk/T1-common/common/ucb_noflow.v" 
    47 add_file -verilog "../trunk/T1-common/m1/m1.V" 
    48 add_file -verilog "../trunk/T1-common/srams/bw_r_cm16x40.v" 
    49 add_file -verilog "../trunk/T1-common/srams/bw_r_cm16x40b.v" 
    50 add_file -verilog "../trunk/T1-common/srams/bw_r_dcd.v" 
    51 add_file -verilog "../trunk/T1-common/srams/bw_r_dcm.v" 
    52 add_file -verilog "../trunk/T1-common/srams/bw_r_efa.v" 
    53 add_file -verilog "../trunk/T1-common/srams/bw_r_frf.v" 
    54 add_file -verilog "../trunk/T1-common/srams/bw_r_icd.v" 
    55 add_file -verilog "../trunk/T1-common/srams/bw_r_idct.v" 
    56 add_file -verilog "../trunk/T1-common/srams/bw_r_irf.v" 
    57 add_file -verilog "../trunk/T1-common/srams/bw_r_irf_fpga1.v" 
    58 add_file -verilog "../trunk/T1-common/srams/bw_r_irf_register.v" 
    59 add_file -verilog "../trunk/T1-common/srams/bw_r_l2d.v" 
    60 add_file -verilog "../trunk/T1-common/srams/bw_r_l2d_32k.v" 
    61 add_file -verilog "../trunk/T1-common/srams/bw_r_l2d_rep_bot.v" 
    62 add_file -verilog "../trunk/T1-common/srams/bw_r_l2d_rep_top.v" 
    63 add_file -verilog "../trunk/T1-common/srams/bw_r_l2t.v" 
    64 add_file -verilog "../trunk/T1-common/srams/bw_r_rf16x128d.v" 
    65 add_file -verilog "../trunk/T1-common/srams/bw_r_rf16x160.v" 
    66 add_file -verilog "../trunk/T1-common/srams/bw_r_rf16x32.v" 
    67 add_file -verilog "../trunk/T1-common/srams/bw_r_rf32x108.v" 
    68 add_file -verilog "../trunk/T1-common/srams/bw_r_rf32x152b.v" 
    69 add_file -verilog "../trunk/T1-common/srams/bw_r_rf32x80.v" 
    70 add_file -verilog "../trunk/T1-common/srams/bw_r_scm.v" 
    71 add_file -verilog "../trunk/T1-common/srams/bw_r_tlb.v" 
    72 add_file -verilog "../trunk/T1-common/srams/bw_r_tlb_fpga.v" 
    73 add_file -verilog "../trunk/T1-common/srams/bw_rf_16x65.v" 
    74 add_file -verilog "../trunk/T1-common/srams/bw_rf_16x81.v" 
    75 add_file -verilog "../trunk/T1-common/srams/regfile_1w_4r.v" 
    76 add_file -verilog "../trunk/T1-common/u1/u1.V" 
    77 add_file -verilog "../trunk/T1-FPU/bw_clk_cl_fpu_cmp.v" 
    78 add_file -verilog "../trunk/T1-FPU/fpu.v" 
    79 add_file -verilog "../trunk/T1-FPU/fpu_add.v" 
    80 add_file -verilog "../trunk/T1-FPU/fpu_add_ctl.v" 
    81 add_file -verilog "../trunk/T1-FPU/fpu_add_exp_dp.v" 
    82 add_file -verilog "../trunk/T1-FPU/fpu_add_frac_dp.v" 
    83 add_file -verilog "../trunk/T1-FPU/fpu_cnt_lead0_53b.v" 
    84 add_file -verilog "../trunk/T1-FPU/fpu_cnt_lead0_64b.v" 
    85 add_file -verilog "../trunk/T1-FPU/fpu_cnt_lead0_lvl1.v" 
    86 add_file -verilog "../trunk/T1-FPU/fpu_cnt_lead0_lvl2.v" 
    87 add_file -verilog "../trunk/T1-FPU/fpu_cnt_lead0_lvl3.v" 
    88 add_file -verilog "../trunk/T1-FPU/fpu_cnt_lead0_lvl4.v" 
    89 add_file -verilog "../trunk/T1-FPU/fpu_denorm_3b.v" 
    90 add_file -verilog "../trunk/T1-FPU/fpu_denorm_3to1.v" 
    91 add_file -verilog "../trunk/T1-FPU/fpu_denorm_frac.v" 
    92 add_file -verilog "../trunk/T1-FPU/fpu_div.v" 
    93 add_file -verilog "../trunk/T1-FPU/fpu_div_ctl.v" 
    94 add_file -verilog "../trunk/T1-FPU/fpu_div_exp_dp.v" 
    95 add_file -verilog "../trunk/T1-FPU/fpu_div_frac_dp.v" 
    96 add_file -verilog "../trunk/T1-FPU/fpu_in.v" 
    97 add_file -verilog "../trunk/T1-FPU/fpu_in2_gt_in1_2b.v" 
    98 add_file -verilog "../trunk/T1-FPU/fpu_in2_gt_in1_3b.v" 
    99 add_file -verilog "../trunk/T1-FPU/fpu_in2_gt_in1_3to1.v" 
    100 add_file -verilog "../trunk/T1-FPU/fpu_in2_gt_in1_frac.v" 
    101 add_file -verilog "../trunk/T1-FPU/fpu_in_ctl.v" 
    102 add_file -verilog "../trunk/T1-FPU/fpu_in_dp.v" 
    103 add_file -verilog "../trunk/T1-FPU/fpu_mul.v" 
    104 add_file -verilog "../trunk/T1-FPU/fpu_mul_ctl.v" 
    105 add_file -verilog "../trunk/T1-FPU/fpu_mul_exp_dp.v" 
    106 add_file -verilog "../trunk/T1-FPU/fpu_mul_frac_dp.v" 
    107 add_file -verilog "../trunk/T1-FPU/fpu_out.v" 
    108 add_file -verilog "../trunk/T1-FPU/fpu_out_ctl.v" 
    109 add_file -verilog "../trunk/T1-FPU/fpu_out_dp.v" 
    110 add_file -verilog "../trunk/T1-FPU/fpu_rptr_groups.v" 
    111 add_file -verilog "../trunk/T1-FPU/fpu_rptr_macros.v" 
    112 add_file -verilog "../trunk/T1-FPU/fpu_rptr_min_global.v" 
    113 add_file -verilog "../trunk/WB/wb_conbus_arb.v" 
    114 add_file -verilog "../trunk/WB/wb_conbus_defines.v" 
    115 add_file -verilog "../trunk/WB/wb_conbus_top.v" 
    116 add_file -verilog "../trunk/WB2ALTDDR3/dram_wb.v" 
    117 add_file -verilog "../xup5lx110t/cachedir.v" 
    118 add_file -verilog "../xup5lx110t/ipcore_dir/dram_fifo.v" 
    119 add_file -verilog "../xup5lx110t/ipcore_dir/pcx_fifo.v" 
    120 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/dram.v" 
    121 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_chipscope.v" 
    122 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_ctrl.v" 
    123 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_idelay_ctrl.v" 
    124 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_infrastructure.v" 
    125 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_mem_if_top.v" 
    126 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_calib.v" 
    127 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_ctl_io.v" 
    128 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_dm_iob.v" 
    129 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_dq_iob.v" 
    130 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_dqs_iob.v" 
    131 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_init.v" 
    132 add_file -vhdl -lib work "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_init.vhd" 
    133 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_io.v" 
    134 add_file -vhdl -lib work "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_io.vhd" 
    135 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_top.v" 
    136 add_file -vhdl -lib work "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_top.vhd" 
    137 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_write.v" 
    138 add_file -vhdl -lib work "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_phy_write.vhd" 
    139 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_top.v" 
    140 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_usr_addr_fifo.v" 
    141 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_usr_rd.v" 
    142 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_usr_top.v" 
    143 add_file -verilog "../xup5lx110t/ipcore_dir/dram/user_design/rtl/ddr2_usr_wr.v" 
    144 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu.v" 
    145 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_alu.v" 
    146 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_alu_16eql.v" 
    147 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_aluadder64.v" 
    148 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_aluaddsub.v" 
    149 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_alulogic.v" 
    150 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_aluor32.v" 
    151 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_aluspr.v" 
    152 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_aluzcmp64.v" 
    153 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_byp.v" 
    154 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_byp_eccgen.v" 
    155 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_div.v" 
    156 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_div_32eql.v" 
    157 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_div_yreg.v" 
    158 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_ecc.v" 
    159 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_ecc_dec.v" 
    160 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_ecl.v" 
    161 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_ecl_cnt6.v" 
    162 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_ecl_divcntl.v" 
    163 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_ecl_eccctl.v" 
    164 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_ecl_mdqctl.v" 
    165 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_ecl_wb.v" 
    166 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_eclbyplog.v" 
    167 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_eclbyplog_rs1.v" 
    168 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_eclccr.v" 
    169 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_eclcomp7.v" 
    170 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_reg.v" 
    171 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_rml.v" 
    172 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_rml_cwp.v" 
    173 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_rml_inc3.v" 
    174 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_rndrob.v" 
    175 add_file -verilog "../trunk/T1-CPU/exu/sparc_exu_shft.v" 
    176 add_file -verilog "../trunk/T1-CPU/ffu/sparc_ffu.v" 
    177 add_file -verilog "../trunk/T1-CPU/ffu/sparc_ffu_ctl.v" 
    178 add_file -verilog "../trunk/T1-CPU/ffu/sparc_ffu_ctl_visctl.v" 
    179 add_file -verilog "../trunk/T1-CPU/ffu/sparc_ffu_dp.v" 
    180 add_file -verilog "../trunk/T1-CPU/ffu/sparc_ffu_part_add32.v" 
    181 add_file -verilog "../trunk/T1-CPU/ffu/sparc_ffu_vis.v" 
    182 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu.v" 
    183 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_cmp35.v" 
    184 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_ctr5.v" 
    185 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_dcl.v" 
    186 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_dec.v" 
    187 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_errctl.v" 
    188 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_errdp.v" 
    189 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_fcl.v" 
    190 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_fdp.v" 
    191 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_ifqctl.v" 
    192 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_ifqdp.v" 
    193 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_imd.v" 
    194 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_incr46.v" 
    195 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_invctl.v" 
    196 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_lfsr5.v" 
    197 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_lru4.v" 
    198 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_mbist.v" 
    199 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_milfsm.v" 
    200 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_par16.v" 
    201 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_par32.v" 
    202 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_par34.v" 
    203 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_rndrob.v" 
    204 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_sscan.v" 
    205 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_swl.v" 
    206 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_swpla.v" 
    207 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_thrcmpl.v" 
    208 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_thrfsm.v" 
    209 add_file -verilog "../trunk/T1-CPU/ifu/sparc_ifu_wseldp.v" 
    210 add_file -verilog "../trunk/T1-CPU/lsu/lsu.v" 
    211 add_file -verilog "../trunk/T1-CPU/lsu/lsu_asi_decode.v" 
    212 add_file -verilog "../trunk/T1-CPU/lsu/lsu_dc_parity_gen.v" 
    213 add_file -verilog "../trunk/T1-CPU/lsu/lsu_dcache_lfsr.v" 
    214 add_file -verilog "../trunk/T1-CPU/lsu/lsu_dcdp.v" 
    215 add_file -verilog "../trunk/T1-CPU/lsu/lsu_dctl.v" 
    216 add_file -verilog "../trunk/T1-CPU/lsu/lsu_dctldp.v" 
    217 add_file -verilog "../trunk/T1-CPU/lsu/lsu_excpctl.v" 
    218 add_file -verilog "../trunk/T1-CPU/lsu/lsu_pcx_qmon.v" 
    219 add_file -verilog "../trunk/T1-CPU/lsu/lsu_qctl1.v" 
    220 add_file -verilog "../trunk/T1-CPU/lsu/lsu_qctl2.v" 
    221 add_file -verilog "../trunk/T1-CPU/lsu/lsu_qdp1.v" 
    222 add_file -verilog "../trunk/T1-CPU/lsu/lsu_qdp2.v" 
    223 add_file -verilog "../trunk/T1-CPU/lsu/lsu_rrobin_picker2.v" 
    224 add_file -verilog "../trunk/T1-CPU/lsu/lsu_stb_ctl.v" 
    225 add_file -verilog "../trunk/T1-CPU/lsu/lsu_stb_ctldp.v" 
    226 add_file -verilog "../trunk/T1-CPU/lsu/lsu_stb_rwctl.v" 
    227 add_file -verilog "../trunk/T1-CPU/lsu/lsu_stb_rwdp.v" 
    228 add_file -verilog "../trunk/T1-CPU/lsu/lsu_tagdp.v" 
    229 add_file -verilog "../trunk/T1-CPU/lsu/lsu_tlbdp.v" 
    230 add_file -verilog "../trunk/T1-CPU/mul/mul64.v" 
    231 add_file -verilog "../trunk/T1-CPU/mul/sparc_mul_cntl.v" 
    232 add_file -verilog "../trunk/T1-CPU/mul/sparc_mul_dp.v" 
    233 add_file -verilog "../trunk/T1-CPU/mul/sparc_mul_top.v" 
    234 add_file -verilog "../trunk/T1-CPU/rtl/bw_clk_cl_sparc_cmp.v" 
    235 add_file -verilog "../trunk/T1-CPU/rtl/cpx_spc_buf.v" 
    236 add_file -verilog "../trunk/T1-CPU/rtl/cpx_spc_rpt.v" 
    237 add_file -verilog "../trunk/T1-CPU/rtl/sparc.v" 
    238 add_file -verilog "../trunk/T1-CPU/rtl/spc_pcx_buf.v" 
    239 add_file -verilog "../trunk/T1-CPU/spu/spu.v" 
    240 add_file -verilog "../trunk/T1-CPU/spu/spu_ctl.v" 
    241 add_file -verilog "../trunk/T1-CPU/spu/spu_lsurpt.v" 
    242 add_file -verilog "../trunk/T1-CPU/spu/spu_lsurpt1.v" 
    243 add_file -verilog "../trunk/T1-CPU/spu/spu_maaddr.v" 
    244 add_file -verilog "../trunk/T1-CPU/spu/spu_maaeqb.v" 
    245 add_file -verilog "../trunk/T1-CPU/spu/spu_mactl.v" 
    246 add_file -verilog "../trunk/T1-CPU/spu/spu_madp.v" 
    247 add_file -verilog "../trunk/T1-CPU/spu/spu_maexp.v" 
    248 add_file -verilog "../trunk/T1-CPU/spu/spu_mald.v" 
    249 add_file -verilog "../trunk/T1-CPU/spu/spu_mamul.v" 
    250 add_file -verilog "../trunk/T1-CPU/spu/spu_mared.v" 
    251 add_file -verilog "../trunk/T1-CPU/spu/spu_mast.v" 
    252 add_file -verilog "../trunk/T1-CPU/spu/spu_wen.v" 
    253 add_file -verilog "../trunk/T1-CPU/tlu/sparc_tlu_dec64.v" 
    254 add_file -verilog "../trunk/T1-CPU/tlu/sparc_tlu_intctl.v" 
    255 add_file -verilog "../trunk/T1-CPU/tlu/sparc_tlu_intdp.v" 
    256 add_file -verilog "../trunk/T1-CPU/tlu/sparc_tlu_penc64.v" 
    257 add_file -verilog "../trunk/T1-CPU/tlu/sparc_tlu_zcmp64.v" 
    258 add_file -verilog "../trunk/T1-CPU/tlu/tlu.v" 
    259 add_file -verilog "../trunk/T1-CPU/tlu/tlu_addern_32.v" 
    260 add_file -verilog "../trunk/T1-CPU/tlu/tlu_hyperv.v" 
    261 add_file -verilog "../trunk/T1-CPU/tlu/tlu_incr64.v" 
    262 add_file -verilog "../trunk/T1-CPU/tlu/tlu_misctl.v" 
    263 add_file -verilog "../trunk/T1-CPU/tlu/tlu_mmu_ctl.v" 
    264 add_file -verilog "../trunk/T1-CPU/tlu/tlu_mmu_dp.v" 
    265 add_file -verilog "../trunk/T1-CPU/tlu/tlu_pib.v" 
    266 add_file -verilog "../trunk/T1-CPU/tlu/tlu_prencoder16.v" 
    267 add_file -verilog "../trunk/T1-CPU/tlu/tlu_rrobin_picker.v" 
    268 add_file -verilog "../trunk/T1-CPU/tlu/tlu_tcl.v" 
    269 add_file -verilog "../trunk/T1-CPU/tlu/tlu_tdp.v" 
    270 add_file -verilog "../xup5lx110t/ipcore_dir/pll.v" 
     6add_file -verilog "../T1-common/include/xst_defines.h" 
     7add_file -verilog "../Top/W1.v" 
     8add_file -verilog "../OC-UART/raminfr.v" 
     9add_file -verilog "../OC-UART/timescale.v" 
     10add_file -verilog "../OC-UART/uart_debug_if.v" 
     11add_file -verilog "../OC-UART/uart_defines.v" 
     12add_file -verilog "../OC-UART/uart_receiver.v" 
     13add_file -verilog "../OC-UART/uart_regs.v" 
     14add_file -verilog "../OC-UART/uart_rfifo.v" 
     15add_file -verilog "../OC-UART/uart_sync_flops.v" 
     16add_file -verilog "../OC-UART/uart_tfifo.v" 
     17add_file -verilog "../OC-UART/uart_top.v" 
     18add_file -verilog "../OC-UART/uart_transmitter.v" 
     19add_file -verilog "../OC-UART/uart_wb.v" 
     20add_file -verilog "../NOR-flash/WBFLASH.v" 
     21add_file -verilog "../os2wb/l1ddir.v" 
     22add_file -verilog "../os2wb/l1dir.v" 
     23add_file -verilog "../os2wb/l1idir.v" 
     24add_file -verilog "../os2wb/os2wb.v" 
     25add_file -verilog "../os2wb/os2wb_dual.v" 
     26add_file -verilog "../os2wb/rst_ctrl.v" 
     27add_file -verilog "../os2wb/s1_top.v" 
     28add_file -verilog "../T1-common/common/cluster_header.v" 
     29add_file -verilog "../T1-common/common/cluster_header_ctu.v" 
     30add_file -verilog "../T1-common/common/cluster_header_dup.v" 
     31add_file -verilog "../T1-common/common/cluster_header_sync.v" 
     32add_file -verilog "../T1-common/common/cmp_sram_redhdr.v" 
     33add_file -verilog "../T1-common/common/dbl_buf.v" 
     34add_file -verilog "../T1-common/common/swrvr_clib.v" 
     35add_file -verilog "../T1-common/common/swrvr_dlib.v" 
     36add_file -verilog "../T1-common/common/sync_pulse_synchronizer.v" 
     37add_file -verilog "../T1-common/common/synchronizer_asr.v" 
     38add_file -verilog "../T1-common/common/synchronizer_asr_dup.v" 
     39add_file -verilog "../T1-common/common/test_stub_bist.v" 
     40add_file -verilog "../T1-common/common/test_stub_scan.v" 
     41add_file -verilog "../T1-common/common/ucb_bus_in.v" 
     42add_file -verilog "../T1-common/common/ucb_bus_out.v" 
     43add_file -verilog "../T1-common/common/ucb_flow_2buf.v" 
     44add_file -verilog "../T1-common/common/ucb_flow_jbi.v" 
     45add_file -verilog "../T1-common/common/ucb_flow_spi.v" 
     46add_file -verilog "../T1-common/common/ucb_noflow.v" 
     47add_file -verilog "../T1-common/m1/m1.V" 
     48add_file -verilog "../T1-common/srams/bw_r_cm16x40.v" 
     49add_file -verilog "../T1-common/srams/bw_r_cm16x40b.v" 
     50add_file -verilog "../T1-common/srams/bw_r_dcd.v" 
     51add_file -verilog "../T1-common/srams/bw_r_dcm.v" 
     52add_file -verilog "../T1-common/srams/bw_r_efa.v" 
     53add_file -verilog "../T1-common/srams/bw_r_frf.v" 
     54add_file -verilog "../T1-common/srams/bw_r_icd.v" 
     55add_file -verilog "../T1-common/srams/bw_r_idct.v" 
     56add_file -verilog "../T1-common/srams/bw_r_irf.v" 
     57add_file -verilog "../T1-common/srams/bw_r_irf_fpga1.v" 
     58add_file -verilog "../T1-common/srams/bw_r_irf_register.v" 
     59add_file -verilog "../T1-common/srams/bw_r_l2d.v" 
     60add_file -verilog "../T1-common/srams/bw_r_l2d_32k.v" 
     61add_file -verilog "../T1-common/srams/bw_r_l2d_rep_bot.v" 
     62add_file -verilog "../T1-common/srams/bw_r_l2d_rep_top.v" 
     63add_file -verilog "../T1-common/srams/bw_r_l2t.v" 
     64add_file -verilog "../T1-common/srams/bw_r_rf16x128d.v" 
     65add_file -verilog "../T1-common/srams/bw_r_rf16x160.v" 
     66add_file -verilog "../T1-common/srams/bw_r_rf16x32.v" 
     67add_file -verilog "../T1-common/srams/bw_r_rf32x108.v" 
     68add_file -verilog "../T1-common/srams/bw_r_rf32x152b.v" 
     69add_file -verilog "../T1-common/srams/bw_r_rf32x80.v" 
     70add_file -verilog "../T1-common/srams/bw_r_scm.v" 
     71add_file -verilog "../T1-common/srams/bw_r_tlb.v" 
     72add_file -verilog "../T1-common/srams/bw_r_tlb_fpga.v" 
     73add_file -verilog "../T1-common/srams/bw_rf_16x65.v" 
     74add_file -verilog "../T1-common/srams/bw_rf_16x81.v" 
     75add_file -verilog "../T1-common/srams/regfile_1w_4r.v" 
     76add_file -verilog "../T1-common/u1/u1.V" 
     77add_file -verilog "../T1-FPU/bw_clk_cl_fpu_cmp.v" 
     78add_file -verilog "../T1-FPU/fpu.v" 
     79add_file -verilog "../T1-FPU/fpu_add.v" 
     80add_file -verilog "../T1-FPU/fpu_add_ctl.v" 
     81add_file -verilog "../T1-FPU/fpu_add_exp_dp.v" 
     82add_file -verilog "../T1-FPU/fpu_add_frac_dp.v" 
     83add_file -verilog "../T1-FPU/fpu_cnt_lead0_53b.v" 
     84add_file -verilog "../T1-FPU/fpu_cnt_lead0_64b.v" 
     85add_file -verilog "../T1-FPU/fpu_cnt_lead0_lvl1.v" 
     86add_file -verilog "../T1-FPU/fpu_cnt_lead0_lvl2.v" 
     87add_file -verilog "../T1-FPU/fpu_cnt_lead0_lvl3.v" 
     88add_file -verilog "../T1-FPU/fpu_cnt_lead0_lvl4.v" 
     89add_file -verilog "../T1-FPU/fpu_denorm_3b.v" 
     90add_file -verilog "../T1-FPU/fpu_denorm_3to1.v" 
     91add_file -verilog "../T1-FPU/fpu_denorm_frac.v" 
     92add_file -verilog "../T1-FPU/fpu_div.v" 
     93add_file -verilog "../T1-FPU/fpu_div_ctl.v" 
     94add_file -verilog "../T1-FPU/fpu_div_exp_dp.v" 
     95add_file -verilog "../T1-FPU/fpu_div_frac_dp.v" 
     96add_file -verilog "../T1-FPU/fpu_in.v" 
     97add_file -verilog "../T1-FPU/fpu_in2_gt_in1_2b.v" 
     98add_file -verilog "../T1-FPU/fpu_in2_gt_in1_3b.v" 
     99add_file -verilog "../T1-FPU/fpu_in2_gt_in1_3to1.v" 
     100add_file -verilog "../T1-FPU/fpu_in2_gt_in1_frac.v" 
     101add_file -verilog "../T1-FPU/fpu_in_ctl.v" 
     102add_file -verilog "../T1-FPU/fpu_in_dp.v" 
     103add_file -verilog "../T1-FPU/fpu_mul.v" 
     104add_file -verilog "../T1-FPU/fpu_mul_ctl.v" 
     105add_file -verilog "../T1-FPU/fpu_mul_exp_dp.v" 
     106add_file -verilog "../T1-FPU/fpu_mul_frac_dp.v" 
     107add_file -verilog "../T1-FPU/fpu_out.v" 
     108add_file -verilog "../T1-FPU/fpu_out_ctl.v" 
     109add_file -verilog "../T1-FPU/fpu_out_dp.v" 
     110add_file -verilog "../T1-FPU/fpu_rptr_groups.v" 
     111add_file -verilog "../T1-FPU/fpu_rptr_macros.v" 
     112add_file -verilog "../T1-FPU/fpu_rptr_min_global.v" 
     113add_file -verilog "../WB/wb_conbus_arb.v" 
     114add_file -verilog "../WB/wb_conbus_defines.v" 
     115add_file -verilog "../WB/wb_conbus_top.v" 
     116add_file -verilog "../WB2ALTDDR3/dram_wb.v" 
     117add_file -verilog "../Xilinx/cachedir.v" 
     118add_file -verilog "../Xilinx/dram_fifo.v" 
     119add_file -verilog "../Xilinx/pcx_fifo.v" 
     120add_file -verilog "../Xilinx/dram.v" 
     121add_file -verilog "../Xilinx/ddr2_chipscope.v" 
     122add_file -verilog "../Xilinx/ddr2_ctrl.v" 
     123add_file -verilog "../Xilinx/ddr2_idelay_ctrl.v" 
     124add_file -verilog "../Xilinx/ddr2_infrastructure.v" 
     125add_file -verilog "../Xilinx/ddr2_mem_if_top.v" 
     126add_file -verilog "../Xilinx/ddr2_phy_calib.v" 
     127add_file -verilog "../Xilinx/ddr2_phy_ctl_io.v" 
     128add_file -verilog "../Xilinx/ddr2_phy_dm_iob.v" 
     129add_file -verilog "../Xilinx/ddr2_phy_dq_iob.v" 
     130add_file -verilog "../Xilinx/ddr2_phy_dqs_iob.v" 
     131add_file -verilog "../Xilinx/ddr2_phy_init.v" 
     132#add_file -vhdl -lib work "../Xilinx/ddr2_phy_init.vhd" 
     133add_file -verilog "../Xilinx/ddr2_phy_io.v" 
     134#add_file -vhdl -lib work "../Xilinx/ddr2_phy_io.vhd" 
     135add_file -verilog "../Xilinx/ddr2_phy_top.v" 
     136#add_file -vhdl -lib work "../Xilinx/ddr2_phy_top.vhd" 
     137add_file -verilog "../Xilinx/ddr2_phy_write.v" 
     138#add_file -vhdl -lib work "../Xilinx/ddr2_phy_write.vhd" 
     139add_file -verilog "../Xilinx/ddr2_top.v" 
     140add_file -verilog "../Xilinx/ddr2_usr_addr_fifo.v" 
     141add_file -verilog "../Xilinx/ddr2_usr_rd.v" 
     142add_file -verilog "../Xilinx/ddr2_usr_top.v" 
     143add_file -verilog "../Xilinx/ddr2_usr_wr.v" 
     144add_file -verilog "../T1-CPU/exu/sparc_exu.v" 
     145add_file -verilog "../T1-CPU/exu/sparc_exu_alu.v" 
     146add_file -verilog "../T1-CPU/exu/sparc_exu_alu_16eql.v" 
     147add_file -verilog "../T1-CPU/exu/sparc_exu_aluadder64.v" 
     148add_file -verilog "../T1-CPU/exu/sparc_exu_aluaddsub.v" 
     149add_file -verilog "../T1-CPU/exu/sparc_exu_alulogic.v" 
     150add_file -verilog "../T1-CPU/exu/sparc_exu_aluor32.v" 
     151add_file -verilog "../T1-CPU/exu/sparc_exu_aluspr.v" 
     152add_file -verilog "../T1-CPU/exu/sparc_exu_aluzcmp64.v" 
     153add_file -verilog "../T1-CPU/exu/sparc_exu_byp.v" 
     154add_file -verilog "../T1-CPU/exu/sparc_exu_byp_eccgen.v" 
     155add_file -verilog "../T1-CPU/exu/sparc_exu_div.v" 
     156add_file -verilog "../T1-CPU/exu/sparc_exu_div_32eql.v" 
     157add_file -verilog "../T1-CPU/exu/sparc_exu_div_yreg.v" 
     158add_file -verilog "../T1-CPU/exu/sparc_exu_ecc.v" 
     159add_file -verilog "../T1-CPU/exu/sparc_exu_ecc_dec.v" 
     160add_file -verilog "../T1-CPU/exu/sparc_exu_ecl.v" 
     161add_file -verilog "../T1-CPU/exu/sparc_exu_ecl_cnt6.v" 
     162add_file -verilog "../T1-CPU/exu/sparc_exu_ecl_divcntl.v" 
     163add_file -verilog "../T1-CPU/exu/sparc_exu_ecl_eccctl.v" 
     164add_file -verilog "../T1-CPU/exu/sparc_exu_ecl_mdqctl.v" 
     165add_file -verilog "../T1-CPU/exu/sparc_exu_ecl_wb.v" 
     166add_file -verilog "../T1-CPU/exu/sparc_exu_eclbyplog.v" 
     167add_file -verilog "../T1-CPU/exu/sparc_exu_eclbyplog_rs1.v" 
     168add_file -verilog "../T1-CPU/exu/sparc_exu_eclccr.v" 
     169add_file -verilog "../T1-CPU/exu/sparc_exu_eclcomp7.v" 
     170add_file -verilog "../T1-CPU/exu/sparc_exu_reg.v" 
     171add_file -verilog "../T1-CPU/exu/sparc_exu_rml.v" 
     172add_file -verilog "../T1-CPU/exu/sparc_exu_rml_cwp.v" 
     173add_file -verilog "../T1-CPU/exu/sparc_exu_rml_inc3.v" 
     174add_file -verilog "../T1-CPU/exu/sparc_exu_rndrob.v" 
     175add_file -verilog "../T1-CPU/exu/sparc_exu_shft.v" 
     176add_file -verilog "../T1-CPU/ffu/sparc_ffu.v" 
     177add_file -verilog "../T1-CPU/ffu/sparc_ffu_ctl.v" 
     178add_file -verilog "../T1-CPU/ffu/sparc_ffu_ctl_visctl.v" 
     179add_file -verilog "../T1-CPU/ffu/sparc_ffu_dp.v" 
     180add_file -verilog "../T1-CPU/ffu/sparc_ffu_part_add32.v" 
     181add_file -verilog "../T1-CPU/ffu/sparc_ffu_vis.v" 
     182add_file -verilog "../T1-CPU/ifu/sparc_ifu.v" 
     183add_file -verilog "../T1-CPU/ifu/sparc_ifu_cmp35.v" 
     184add_file -verilog "../T1-CPU/ifu/sparc_ifu_ctr5.v" 
     185add_file -verilog "../T1-CPU/ifu/sparc_ifu_dcl.v" 
     186add_file -verilog "../T1-CPU/ifu/sparc_ifu_dec.v" 
     187add_file -verilog "../T1-CPU/ifu/sparc_ifu_errctl.v" 
     188add_file -verilog "../T1-CPU/ifu/sparc_ifu_errdp.v" 
     189add_file -verilog "../T1-CPU/ifu/sparc_ifu_fcl.v" 
     190add_file -verilog "../T1-CPU/ifu/sparc_ifu_fdp.v" 
     191add_file -verilog "../T1-CPU/ifu/sparc_ifu_ifqctl.v" 
     192add_file -verilog "../T1-CPU/ifu/sparc_ifu_ifqdp.v" 
     193add_file -verilog "../T1-CPU/ifu/sparc_ifu_imd.v" 
     194add_file -verilog "../T1-CPU/ifu/sparc_ifu_incr46.v" 
     195add_file -verilog "../T1-CPU/ifu/sparc_ifu_invctl.v" 
     196add_file -verilog "../T1-CPU/ifu/sparc_ifu_lfsr5.v" 
     197add_file -verilog "../T1-CPU/ifu/sparc_ifu_lru4.v" 
     198add_file -verilog "../T1-CPU/ifu/sparc_ifu_mbist.v" 
     199add_file -verilog "../T1-CPU/ifu/sparc_ifu_milfsm.v" 
     200add_file -verilog "../T1-CPU/ifu/sparc_ifu_par16.v" 
     201add_file -verilog "../T1-CPU/ifu/sparc_ifu_par32.v" 
     202add_file -verilog "../T1-CPU/ifu/sparc_ifu_par34.v" 
     203add_file -verilog "../T1-CPU/ifu/sparc_ifu_rndrob.v" 
     204add_file -verilog "../T1-CPU/ifu/sparc_ifu_sscan.v" 
     205add_file -verilog "../T1-CPU/ifu/sparc_ifu_swl.v" 
     206add_file -verilog "../T1-CPU/ifu/sparc_ifu_swpla.v" 
     207add_file -verilog "../T1-CPU/ifu/sparc_ifu_thrcmpl.v" 
     208add_file -verilog "../T1-CPU/ifu/sparc_ifu_thrfsm.v" 
     209add_file -verilog "../T1-CPU/ifu/sparc_ifu_wseldp.v" 
     210add_file -verilog "../T1-CPU/lsu/lsu.v" 
     211add_file -verilog "../T1-CPU/lsu/lsu_asi_decode.v" 
     212add_file -verilog "../T1-CPU/lsu/lsu_dc_parity_gen.v" 
     213add_file -verilog "../T1-CPU/lsu/lsu_dcache_lfsr.v" 
     214add_file -verilog "../T1-CPU/lsu/lsu_dcdp.v" 
     215add_file -verilog "../T1-CPU/lsu/lsu_dctl.v" 
     216add_file -verilog "../T1-CPU/lsu/lsu_dctldp.v" 
     217add_file -verilog "../T1-CPU/lsu/lsu_excpctl.v" 
     218add_file -verilog "../T1-CPU/lsu/lsu_pcx_qmon.v" 
     219add_file -verilog "../T1-CPU/lsu/lsu_qctl1.v" 
     220add_file -verilog "../T1-CPU/lsu/lsu_qctl2.v" 
     221add_file -verilog "../T1-CPU/lsu/lsu_qdp1.v" 
     222add_file -verilog "../T1-CPU/lsu/lsu_qdp2.v" 
     223add_file -verilog "../T1-CPU/lsu/lsu_rrobin_picker2.v" 
     224add_file -verilog "../T1-CPU/lsu/lsu_stb_ctl.v" 
     225add_file -verilog "../T1-CPU/lsu/lsu_stb_ctldp.v" 
     226add_file -verilog "../T1-CPU/lsu/lsu_stb_rwctl.v" 
     227add_file -verilog "../T1-CPU/lsu/lsu_stb_rwdp.v" 
     228add_file -verilog "../T1-CPU/lsu/lsu_tagdp.v" 
     229add_file -verilog "../T1-CPU/lsu/lsu_tlbdp.v" 
     230add_file -verilog "../T1-CPU/mul/mul64.v" 
     231add_file -verilog "../T1-CPU/mul/sparc_mul_cntl.v" 
     232add_file -verilog "../T1-CPU/mul/sparc_mul_dp.v" 
     233add_file -verilog "../T1-CPU/mul/sparc_mul_top.v" 
     234add_file -verilog "../T1-CPU/rtl/bw_clk_cl_sparc_cmp.v" 
     235add_file -verilog "../T1-CPU/rtl/cpx_spc_buf.v" 
     236add_file -verilog "../T1-CPU/rtl/cpx_spc_rpt.v" 
     237add_file -verilog "../T1-CPU/rtl/sparc.v" 
     238add_file -verilog "../T1-CPU/rtl/spc_pcx_buf.v" 
     239add_file -verilog "../T1-CPU/spu/spu.v" 
     240add_file -verilog "../T1-CPU/spu/spu_ctl.v" 
     241add_file -verilog "../T1-CPU/spu/spu_lsurpt.v" 
     242add_file -verilog "../T1-CPU/spu/spu_lsurpt1.v" 
     243add_file -verilog "../T1-CPU/spu/spu_maaddr.v" 
     244add_file -verilog "../T1-CPU/spu/spu_maaeqb.v" 
     245add_file -verilog "../T1-CPU/spu/spu_mactl.v" 
     246add_file -verilog "../T1-CPU/spu/spu_madp.v" 
     247add_file -verilog "../T1-CPU/spu/spu_maexp.v" 
     248add_file -verilog "../T1-CPU/spu/spu_mald.v" 
     249add_file -verilog "../T1-CPU/spu/spu_mamul.v" 
     250add_file -verilog "../T1-CPU/spu/spu_mared.v" 
     251add_file -verilog "../T1-CPU/spu/spu_mast.v" 
     252add_file -verilog "../T1-CPU/spu/spu_wen.v" 
     253add_file -verilog "../T1-CPU/tlu/sparc_tlu_dec64.v" 
     254add_file -verilog "../T1-CPU/tlu/sparc_tlu_intctl.v" 
     255add_file -verilog "../T1-CPU/tlu/sparc_tlu_intdp.v" 
     256add_file -verilog "../T1-CPU/tlu/sparc_tlu_penc64.v" 
     257add_file -verilog "../T1-CPU/tlu/sparc_tlu_zcmp64.v" 
     258add_file -verilog "../T1-CPU/tlu/tlu.v" 
     259add_file -verilog "../T1-CPU/tlu/tlu_addern_32.v" 
     260add_file -verilog "../T1-CPU/tlu/tlu_hyperv.v" 
     261add_file -verilog "../T1-CPU/tlu/tlu_incr64.v" 
     262add_file -verilog "../T1-CPU/tlu/tlu_misctl.v" 
     263add_file -verilog "../T1-CPU/tlu/tlu_mmu_ctl.v" 
     264add_file -verilog "../T1-CPU/tlu/tlu_mmu_dp.v" 
     265add_file -verilog "../T1-CPU/tlu/tlu_pib.v" 
     266add_file -verilog "../T1-CPU/tlu/tlu_prencoder16.v" 
     267add_file -verilog "../T1-CPU/tlu/tlu_rrobin_picker.v" 
     268add_file -verilog "../T1-CPU/tlu/tlu_tcl.v" 
     269add_file -verilog "../T1-CPU/tlu/tlu_tdp.v" 
     270add_file -verilog "../Xilinx/pll.v" 
    271271 
    272272 
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