Changeset 15 in XOpenSparcT1


Ignore:
Timestamp:
03/24/11 14:58:51 (14 years ago)
Author:
pntsvt00
Message:

modificato simula.do: ora arriva al Loadimg della simulazione

File:
1 edited

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  • trunk/sim/simula.do

    r14 r15  
    1313vlog +incdir+../T1-common/include/ ../os2wb/*.v 
    1414vlog +incdir+../T1-common/include/ ../T1-common/m1/*.V 
    15 vlog +incdir+../T1-common/include/ ../T1-common/srams/*.v 
     15vlog +define+FPGA_SYN +incdir+../T1-common/include/ ../T1-common/srams/*.v 
    1616vlog +incdir+../T1-common/include/ ../T1-common/u1/*.V 
    1717vlog +incdir+../T1-common/include/ ../T1-FPU/*.v 
    … …  
    3939#Load the design. Use required libraries.# 
    4040 
    41 vsim -c -t ps -novopt +notimingchecks -L unisims_ver work.tb_top glbl 
     41vsim -c -t ps -novopt +notimingchecks -L unisims_ver -L XilinxCoreLib work.tb_top glbl 
    4242#vsim -c -t ps -novopt +notimingchecks work.tb_top glbl 
    4343 
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