Changeset 16 in XOpenSparcT1

Timestamp:

03/24/11 15:05:49 (13 years ago)

Author:

pntsvt00

Message:

ora la simulazione parte

File:

• trunk/sim/tb_top.v (modified) (1 diff)

trunk/sim/tb_top.v

@@ -32 +32 @@
    wire [DQS_WIDTH-1:0]         ddr2_dqs_n_sdram;
    wire [7:0]                   ddr2_dm_sdram;
-   reg                          ddr2_clk_sdram;
-   reg                          ddr2_clk_n_sdram;
-   reg                          ddr2_address_sdram;
-   reg [2:0]                    ddr2_ba_sdram;
-   reg                          ddr2_ras_n_sdram;
-   reg                          ddr2_cas_n_sdram;
-   reg                          ddr2_we_n_sdram;
-   reg [CS_WIDTH-1:0]           ddr2_cs_n_sdram;
-   reg                          ddr2_cke_sdram;
-   reg [ODT_WIDTH-1:0]          ddr2_odt_sdram;
+   wire                         ddr2_clk_sdram;
+   wire                         ddr2_clk_n_sdram;
+   wire                         ddr2_address_sdram;
+   wire [2:0]                   ddr2_ba_sdram;
+   wire                         ddr2_ras_n_sdram;
+   wire                         ddr2_cas_n_sdram;
+   wire                         ddr2_we_n_sdram;
+   wire [CS_WIDTH-1:0]          ddr2_cs_n_sdram;
+   wire                         ddr2_cke_sdram;
+   wire [ODT_WIDTH-1:0]         ddr2_odt_sdram;
 
    wire                          stx;