Changeset 17 in XOpenSparcT1 for trunk/Xilinx

Timestamp:

03/25/11 12:19:25 (14 years ago)

Author:

pntsvt00

Message:

la simulazione legge dalla flash

Location:

trunk/Xilinx

Files:

• cachedir.v (modified) (1 diff)
• dram.v (modified) (1 diff)

trunk/Xilinx/cachedir.v

@@ -23 +23 @@
     input enable,
     input wren_a,
-    input [ 7:0] address_a,
+    input [ 8:0] address_a,
     input [28:0] data_a,
     output [ 28:0] q_a,
     input wren_b,
-    input [ 7:0] address_b,
+    input [ 8:0] address_b,
     input [28:0] data_b,
     output [28:0] q_b
     );
 
-reg [28:0] mem1 [(2**7)-1:0];
-reg [28:0] mem2 [(2**7)-1:0];
+reg [28:0] mem1 [(2**8)-1:0];
+reg [28:0] mem2 [(2**8)-1:0];
       
 always @(posedge clock)

trunk/Xilinx/dram.v

@@ -74 +74 @@
    parameter CKE_WIDTH               = 1,       
                                        // # of memory clock enable outputs.
-   parameter CLK_WIDTH               = 2,       
+   parameter CLK_WIDTH               = 1,       
                                        // # of clock outputs.
    parameter COL_WIDTH               = 10,