Changeset 17 in XOpenSparcT1 for trunk/Xilinx/dram.v
- Timestamp:
- 03/25/11 12:19:25 (14 years ago)
- File:
-
- 1 edited
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trunk/Xilinx/dram.v
r10 r17 74 74 parameter CKE_WIDTH = 1, 75 75 // # of memory clock enable outputs. 76 parameter CLK_WIDTH = 2,76 parameter CLK_WIDTH = 1, 77 77 // # of clock outputs. 78 78 parameter COL_WIDTH = 10,
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