Changeset 26 in XOpenSparcT1 for trunk/sim/simula.do

Timestamp:

04/04/11 11:58:11 (13 years ago)

Author:

pntsvt00

Message:

checkpoint: baco con store consecutivi

File:

• trunk/sim/simula.do (modified) (2 diffs)

trunk/sim/simula.do

@@ -1 +1 @@
 #start with: vsim -c -do simula.do
 
+set DEFINE +define+DEBUG+FPGA_SYN
+#+FPGA_NEW_IRF
+set INCLUDEDIR +incdir+../T1-common/include/
 vlib work
 
@@ -7 +10 @@
 #Compile all modules#
 
-vlog +incdir+../T1-common/include/ ../T1-common/common/*.v
-vlog +incdir+../T1-common/include/ ../Top/*.v
-vlog +incdir+../OC-UART +incdir+../T1-common/include/ ../OC-UART/*.v
-vlog +incdir+../T1-common/include/ ../NOR-flash/*.v
-vlog +incdir+../T1-common/include/ ../os2wb/*.v
-vlog +incdir+../T1-common/include/ ../T1-common/m1/*.V
-vlog +define+FPGA_SYN +incdir+../T1-common/include/ ../T1-common/srams/*.v
-vlog +incdir+../T1-common/include/ ../T1-common/u1/*.V
-vlog +incdir+../T1-common/include/ ../T1-FPU/*.v
-vlog +incdir+../T1-common/include/ +incdir+../WB ../WB/*.v
-vlog +incdir+../T1-common/include/ ../WB2ALTDDR3/*.v
-vlog +incdir+../T1-common/include/ ../Xilinx/*.v
-vlog +incdir+../T1-common/include/ ../T1-CPU/exu/*.v
-vlog +incdir+../T1-common/include/ ../T1-CPU/ffu/*.v
-vlog +incdir+../T1-common/include/ ../T1-CPU/ifu/*.v
-vlog +incdir+../T1-common/include/ ../T1-CPU/lsu/*.v
-vlog +incdir+../T1-common/include/ ../T1-CPU/mul/*.v
-vlog +incdir+../T1-common/include/ ../T1-CPU/rtl/*.v
-vlog +incdir+../T1-common/include/ ../T1-CPU/spu/*.v
-vlog +incdir+../T1-common/include/ ../T1-CPU/tlu/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-common/common/*.v
+vlog  $DEFINE $INCLUDEDIR  ../Top/*.v
+vlog  $DEFINE +incdir+../OC-UART $INCLUDEDIR ../OC-UART/*.v
+vlog  $DEFINE $INCLUDEDIR ../NOR-flash/*.v
+vlog  $DEFINE $INCLUDEDIR ../os2wb/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-common/m1/*.V
+vlog  $DEFINE $INCLUDEDIR ../T1-common/srams/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-common/u1/*.V
+vlog  $DEFINE $INCLUDEDIR/ ../T1-FPU/*.v
+vlog  $DEFINE $INCLUDEDIR +incdir+../WB ../WB/*.v
+vlog  $DEFINE $INCLUDEDIR ../WB2ALTDDR3/*.v
+vlog  $DEFINE $INCLUDEDIR ../Xilinx/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-CPU/exu/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-CPU/ffu/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-CPU/ifu/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-CPU/lsu/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-CPU/mul/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-CPU/rtl/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-CPU/spu/*.v
+vlog  $DEFINE $INCLUDEDIR ../T1-CPU/tlu/*.v
 
 #Compile files in sim folder (excluding model parameter file)#