Timeline
04/07/11:
- 16:19 Changeset in XOpenSparcT1 [33] by
- checkpoint
- 16:17 Changeset in HDLQ [6] by
- test permission
- 16:11 Changeset in HDLQ [5] by
- test permission
- 15:49 Changeset in HDLQ [4] by
04/06/11:
- 20:18 Changeset in HDLQ [3] by
- 20:11 Changeset in HDLQ [2] by
- 14:08 Changeset in XOpenSparcT1 [32] by
- aggiunti file per programma uart e linker script
- 14:06 Changeset in XOpenSparcT1 [31] by
- checkpoint: synthesis fail
04/05/11:
- 20:08 Changeset in XOpenSparcT1 [30] by
- aggiornata tool-chain
- 16:45 Changeset in XOpenSparcT1 [29] by
- added coregen files to recreate ngc from xco
- 12:09 Changeset in XOpenSparcT1 [28] by
- Aggiornato prj per sinplify
- 11:59 OpenSparc created by
- 11:40 WikiStart edited by
- (diff)
- 11:33 WikiStart edited by
- (diff)
- 11:33 DftGroup created by
- 11:26 WikiStart edited by
- (diff)
- 11:11 Changeset in HDLQ [1] by
- upload iniziale
- 10:43 Ticket #1 (Prova) closed by
- fixed
- 10:38 Ticket #1 (Prova) created by
- 09:58 Changeset in XOpenSparcT1 [27] by
- eliminato baco store consecutivi. esegue correttamente il codice
04/04/11:
- 11:58 Changeset in XOpenSparcT1 [26] by
- checkpoint: baco con store consecutivi
04/01/11:
- 13:47 Changeset in XOpenSparcT1 [25] by
- updated dump2hex.php
- 10:36 Changeset in XOpenSparcT1 [24] by
- eliminati due FIXME
- 10:30 Changeset in XOpenSparcT1 [23] by
- supera il test di write e read dalla DDR
03/31/11:
- 12:31 Changeset in XOpenSparcT1 [22] by
- checkpoint: la DDR effettua l'init
03/28/11:
- 08:42 Changeset in XOpenSparcT1 [21] by
- modificato hello.c, ora flash.v legge da memory_hello.hex
- 08:42 Changeset in XOpenSparcT1 [20] by
- modificato hello.c, ora flash.v legge da memory_hello.hex
03/25/11:
- 18:21 Changeset in XOpenSparcT1 [19] by
- ora ho 2 sorgenti SPARC-V9, memory.hex e memory_hello.hex
- 16:38 Changeset in XOpenSparcT1 [18] by
- compilato us sorgente con architettura SPARC-V9
- 12:19 Changeset in XOpenSparcT1 [17] by
- la simulazione legge dalla flash
03/24/11:
- 15:05 Changeset in XOpenSparcT1 [16] by
- ora la simulazione parte
- 14:58 Changeset in XOpenSparcT1 [15] by
- modificato simula.do: ora arriva al Loadimg della simulazione
- 14:47 Changeset in XOpenSparcT1 [14] by
- commit per simulazione di os2wb e Top
- 14:42 Changeset in XOpenSparcT1 [13] by
- commit dofile per simulazione
- 14:38 Changeset in XOpenSparcT1 [12] by
- aggiunto flash.v
- 14:38 Changeset in XOpenSparcT1 [11] by
- commit versione simulabile
03/22/11:
- 20:08 Changeset in XOpenSparcT1 [10] by
- versione sintetizzabile
- 11:52 Changeset in XOpenSparcT1 [9] by
- modifiche per la sintesi su Xilinx
- 11:51 Changeset in XOpenSparcT1 [8] by
- modifiche per la sintesi su Xilinx
- 11:45 Changeset in XOpenSparcT1 [7] by
- commit totale versione originale opensparc
- 11:40 Changeset in XOpenSparcT1 [6] by
- versione iniziale opensparc
- 10:22 Changeset in XOpenSparcT1 [5] by
- azzero il repository
- 10:08 Changeset in XOpenSparcT1 [4] by
- ciao
- 09:36 Changeset in XOpenSparcT1 [3] by
- modifica 2
Note: See TracTimeline
for information about the timeline view.